Posted Jul 31, 2022

• 

  FE CAD Engineer
  Intel
  Bangalore, India
  VHDL Verilog System Verilog FPGA RTL

• 

  Graduate Engineering Rotation Program
  Intel
  High Wycombe, Primary Location: High Wycombe, UK
  VHDL Verilog FPGA RTL entry level

• 

  DSP Algorithm Engineer/Researcher
  Intel
  Hillsboro, United States
  FPGA ASIC RTL

• 

  Staff DSP Algorithm Engineer/Researcher
  Intel
  Hillsboro, United States
  FPGA ASIC RTL

• 

  Memory Layout Design
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  Platform Signal Integrity Engineer
  Intel
  Santa Clara, United States
  Verilog FPGA RTL

• 

  SOC Logic Design and Integration Engineer
  Intel
  Hudson, United States
  Verilog System Verilog FPGA ASIC RTL

• 

  Deep Learning Architect
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

• 

  SoC Logic Design and Integration Engineer
  Intel
  Hudson, United States
  Verilog System Verilog FPGA ASIC RTL

• 

  Software Engineer
  Intel
  San Jose, United States
  Verilog FPGA RTL

• 

  Senior Analog Engineer
  Intel
  Toronto, Canada
  Verilog FPGA RTL

• 

  SOC Design Engineer
  Intel
  Phoenix, United States
  FPGA ASIC RTL

• 

  SoC Design Engineer- Pre-Silicon Validation
  Intel
  Hillsboro, United States
  Verilog SystemVerilog FPGA RTL

• 

  Senior/Staff SoC Logic Design Engineer (DFT)
  Intel
  Penang, Malaysia
  Verilog FPGA RTL

• 

  SOC Design Engineer - RTL/Logic - Returnship
  Intel
  Hillsboro, United States
  FPGA RTL

• 

  PMC IP Logic Design Engineer Lead
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

• 

  SoC Pre-Si Verification Engineer
  Intel
  Hudson, United States
  Verilog System Verilog FPGA ASIC RTL

• 

  SoC Design Engineer - Mixed Signal Validation
  Intel
  Hillsboro, United States
  VHDL Verilog SystemVerilog FPGA RTL

• 

  SoC Design Engineer
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  Graphics DFT Engineer
  Intel
  Bangalore, India
  Verilog SystemVerilog FPGA RTL

• 

  graphics hardware engineer
  Intel
  Bangalore, India
  Verilog SystemVerilog FPGA RTL

• 

  Graphics DFT Engineer
  Intel
  Bangalore, India
  Verilog SystemVerilog FPGA RTL

• 

  FPGA Marketing Engineer
  Intel
  San Jose, United States
  FPGA RTL

• 

  Senior ASIC Application Engineer - Customer Enablement
  Intel
  Hillsboro, United States
  FPGA ASIC RTL

Posted Jul 28, 2022

• 

  Physical Design Floorplan Architect
  Intel
  Toronto, Canada
  FPGA ASIC RTL

• 

  SoC Design Engineer: Chipsets SoC Front-End Design - Returnship
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  Senior NAND Design Validation Engineer (SK)
  Intel
  Folsom, United States
  VHDL Verilog FPGA RTL

• 

  Application Engineer
  Intel
  Shanghai, China
  VHDL Verilog FPGA RTL

• 

  SOC Design Engineer - RTL/Logic
  Intel
  Bangalore, India
  FPGA RTL

• 

  SoC Design Engineer - Pre-Silicon Validation Emulation Model Build
  Intel
  Hillsboro, United States
  Verilog FPGA RTL

• 

  DFT ENGINEER (Intel Programmable Solutions Group)
  Intel
  Ho Chi Minh City, Viet Nam
  FPGA ASIC RTL

• 

  SoC Design Engineer- Pre-Silicon Validation
  Intel
  Hillsboro, United States
  Verilog SystemVerilog FPGA RTL

• 

  Xeon SoC Pre-Si Performance Verification Leader/Architect (Hybrid)
  Intel
  Santa Clara, United States
  Verilog FPGA RTL

• 

  Graphics Hardware Engineer
  Intel
  Bangalore, India
  Verilog System Verilog SystemVerilog FPGA RTL

Posted Jul 26, 2022

• 

  Senior Staff IP Logic Design Engineer
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA RTL

• 

  IP Logic Design Engineer
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA RTL

• 

  Business Manager
  Intel
  San Jose, United States
  FPGA ASIC RTL

• 

  Business Manager
  Intel
  San Jose, United States
  FPGA ASIC RTL

• 

  Cloud Solution Engineer
  Intel
  San Jose, United States
  Verilog FPGA RTL

Posted Jul 25, 2022

• 

  Field Applications Engineer
  Intel
  Istanbul, Turkey
  FPGA ASIC RTL

• 

  Graphics HW Design/ Validation Engineer
  Intel
  Phoenix, United States
  Verilog System Verilog FPGA RTL

• 

  RTL Integration Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  Graphics Hardware Engineer
  Intel
  Bangalore, India
  Verilog SystemVerilog FPGA RTL

• 

  FPGA Software Engineer
  Intel
  Toronto, Canada
  FPGA ASIC RTL

• 

  Pre-Silicon Validation Engineer
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA ASIC RTL

• 

  Graphics Hardware Design/Validation Engineer
  Intel
  Phoenix, United States
  Verilog System Verilog FPGA RTL

• 

  Pre-Silicon Design Verification Engineer
  Intel
  Santa Clara, United States
  Verilog FPGA RTL

• 

  Graphics Hardware Design/Validation Engineer
  Intel
  Phoenix, United States
  Verilog System Verilog FPGA RTL

Posted Jul 21, 2022

• 

  C++ Developer for Intel Be'er Sheva
  Intel
  Beer Sheva, Israel
  FPGA ASIC RTL

• 

  Field Application Engineer
  Intel
  High Wycombe, Primary Location: High Wycombe, UK
  FPGA ASIC RTL

• 

  Pre-Silicon Validation Engineer
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA RTL

• 

  FPGA Lead Marketing Strategist
  Intel
  Hillsboro, United States
  FPGA RTL

Posted Jul 19, 2022

• 

  STA/PD methodology-implementation Lead
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  Senior Pre-Silicon Verification Engineer
  Intel
  Brasov, Romania
  Verilog System Verilog SystemVerilog FPGA RTL

• 

  Pre-Silicon verification Team Lead
  Intel
  Brasov, Romania
  Verilog System Verilog SystemVerilog FPGA RTL

• 

  Semiconductor Packaging Architect/Development Lead
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  FPGA Program and Content Specialist
  Intel
  San Jose, United States
  FPGA RTL

• 

  Analog Engineer
  Intel
  San Jose, United States
  Verilog FPGA RTL

• 

  FPGA Software Engineer
  Intel
  Toronto, Canada
  FPGA RTL

• 

  FPGA Technical Marketing Engineer
  Intel
  San Jose, United States
  FPGA RTL

• 

  Senior Chipsets Logic Design Engineer
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

• 

  Chipsets Logic Design Engineer
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

Posted Jul 18, 2022

• 

  logic verification engineer
  Intel
  Haifa, Israel
  FPGA ASIC RTL

• 

  PSG Graduate Technical Intern
  Intel
  Toronto, Canada
  Verilog FPGA RTL internship

• 

  PSG Graduate Technical Intern
  Intel
  Toronto, Canada
  Verilog FPGA RTL internship

Posted Jul 16, 2022

• 

  IP Logic Design Engineer (SK)
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

Posted Jul 15, 2022

• 

  SoC RTL Design Engineer
  Intel
  Bangalore, India
  FPGA RTL

• 

  Senior CPU RTL Design Engineer
  Intel
  Hillsboro, United States
  Verilog SystemVerilog FPGA RTL

• 

  Pre-Silicon verification Team Lead
  Intel
  Brasov, Romania
  Verilog System Verilog SystemVerilog FPGA RTL

• 

  SoC Architect - Fabric
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  SOC Validation Infrastructure engineer
  Intel
  Hudson, United States
  Verilog System Verilog FPGA RTL

• 

  FPGA IP Software Development Engineer
  Intel
  Penang, Malaysia
  FPGA RTL

• 

  PSG Rotation Program
  Intel
  San Jose, United States
  VHDL Verilog FPGA RTL

• 

  PSG Rotation Program Field Engineer
  Intel
  San Jose, United States
  FPGA ASIC RTL

• 

  Pre-Si Verification Engineer
  Intel
  Fort Collins, United States
  Verilog SystemVerilog FPGA RTL

• 

  RTL Design Manager
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA RTL

• 

  Sturctural Design Engineer
  Intel
  Santa Clara, United States
  FPGA ASIC RTL

• 

  Graduate Trainee
  Intel
  Penang, Malaysia
  Verilog SystemVerilog FPGA RTL entry level

Posted Jul 14, 2022

• 

  Graphics Hardware Structural Design Engineer
  Intel
  Bangalore, India
  FPGA RTL

• 

  SoC RTL Design Engineer
  Intel
  Bangalore, India
  FPGA RTL

• 

  FPGA Software Engineer
  Intel
  Toronto, Canada
  FPGA RTL

• 

  CPU Core Structural Design Engineer
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  SoC Design Engineer: Chipsets SoC Front-End Design
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  SOC Design Engineer: Chipsets SOC Front-End Design
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  SoC Design Engineer: Chipsets SoC Front-End Design
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  Sr. Logic Design Engineer- (SK)
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  SOC Design Engineer
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

• 

  Applications Engineer (Graduate Trainee)
  Intel
  Penang, Malaysia
  VHDL Verilog SystemVerilog FPGA RTL entry level

• 

  SoC RAS Architect
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  CIT Logic Design and Architecture Lead
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

• 

  Functional Validation Intern - Student
  Intel
  Guadalajara, Mexico
  VHDL Verilog FPGA RTL internship

Posted Jul 12, 2022

• 

  SOC Design Engineer
  Intel
  Phoenix, United States
  Verilog FPGA RTL

• 

  3D-IC STCO Physical Design Architect
  Intel
  Hillsboro, United States
  Verilog SystemVerilog FPGA RTL

• 

  Pre-Silicon Validation/Verification Engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

• 

  SoC Design Engineer - Graduate Intern
  Intel
  Austin, United States
  Verilog SystemVerilog FPGA RTL internship

Posted Jul 9, 2022

• 

  Pre-Silicon Validation Engineer
  Intel
  Bangalore, India
  FPGA RTL

• 

  Development Tools Software Engineering Manager
  Intel
  Hillsboro, United States
  FPGA ASIC RTL

Posted Jul 8, 2022

• 

  Systems Engineer
  Intel
  Haifa, Israel
  FPGA ASIC RTL

• 

  Logic Design and Pre-silicon Verification Engineer
  Intel
  Hillsboro, United States
  Verilog SystemVerilog FPGA RTL

• 

  Graphics Companion Die Validation Lead
  Intel
  Phoenix, United States
  Verilog System Verilog FPGA RTL

• 

  Validation Engineer
  Intel
  Hyderabad, India
  Verilog System Verilog FPGA ASIC RTL

• 

  PDK Development Engineer
  Intel
  Penang, Malaysia
  FPGA ASIC RTL

Posted Jul 7, 2022

• 

  PDK Customer Support (ASIC Auto Place and Route)
  Intel
  Phoenix, United States
  FPGA ASIC RTL

• 

  Custom-Logic IP Solutions Engineering (CISE) Graduate Trainee
  Intel
  Penang, Malaysia
  VHDL Verilog System Verilog FPGA RTL entry level

• 

  Graduate Trainee (Engineering)
  Intel
  Penang, Malaysia
  VHDL Verilog FPGA RTL entry level

• 

  PQC Cryptographer
  Intel
  Madrid, Spain
  VHDL Verilog FPGA ASIC RTL

• 

  Senior Pre-Silicon verification (DV/AV) Engineer/Team Lead
  Intel
  Bucharest, Romania
  Verilog System Verilog FPGA RTL

• 

  Senior Pre-Silicon verification (DV/AV) Engineer/Team Lead
  Intel
  Bucharest, Romania
  Verilog System Verilog FPGA RTL

• 

  FPGA Software Engineer
  Intel
  Toronto, Canada
  FPGA ASIC RTL

• 

  Transceiver and Protocol IP Application Engineer
  Intel
  San Jose, United States
  VHDL Verilog FPGA RTL

• 

  EDA Software Engineer
  Intel
  San Jose, United States
  VHDL Verilog System Verilog FPGA RTL

Posted Jul 6, 2022

• 

  FPGA Design Applications Engineer, Acceleration Systems
  Intel
  Bangalore, India
  VHDL Verilog FPGA RTL

• 

  Memory Design Engineer
  Intel
  Penang, Malaysia
  FPGA ASIC RTL

• 

  Software Engineer Graduate Trainee
  Intel
  Penang, Malaysia
  Verilog FPGA RTL entry level

Posted Jul 5, 2022

• 

  Application Engineer
  Intel
  Shanghai, China
  VHDL Verilog FPGA RTL

Posted Jul 4, 2022

• 

  Pre Silicon Verification Engineer
  Intel
  Petach-Tiqwa, Israel
  Verilog System Verilog FPGA RTL

Posted Jul 2, 2022

• 

  Chipsets Logic Design Architect
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

Posted Jul 1, 2022

• 

  PPA Structural Design Engineer
  Intel
  Hillsboro, United States
  FPGA ASIC RTL

• 

  SoC Design Engineer - PPA
  Intel
  Hillsboro, United States
  FPGA ASIC RTL

• 

  SOC Emulation Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  SOC Design Engineer - RTL/Logic
  Intel
  Hillsboro, United States
  FPGA RTL

Posted Jun 29, 2022

• 

  Logic design engineer
  Intel
  Petach-Tiqwa, Israel
  Verilog System Verilog FPGA RTL

• 

  FPGA Systems Design Engineer
  Intel
  San Diego, United States
  VHDL Verilog FPGA RTL

Posted Jun 28, 2022

• 

  DFT Engineer
  Intel
  Bangalore, India
  VHDL Verilog FPGA RTL

Posted Jun 25, 2022

• 

  Quality and Reliability Engineer
  Intel
  San Jose, Costa Rica
  VHDL Verilog FPGA RTL

• 

  System Software Development Engineer - Entry Level
  Intel
  Hillsboro, United States
  Verilog FPGA RTL entry level

Posted Jun 24, 2022

• 

  Xeon SoC Structural Design - Graduate Intern
  Intel
  Hudson, United States
  Verilog FPGA RTL internship

• 

  Chipsets Logic Design Manager
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

Posted Jun 23, 2022

• 

  Advanced Memory Design Engineer
  Intel
  Hillsboro, United States
  FPGA ASIC RTL

• 

  Soc DFT Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  SoC DFT Design Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

Posted Jun 22, 2022

• 

  Advanced Front-end Logic Design and Verification Engineer
  Intel
  Hillsboro, United States
  VHDL Verilog System Verilog FPGA RTL

• 

  Product Development Engineer
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  Physical Design Engineer - Graduate Intern
  Intel
  Hillsboro, United States
  FPGA ASIC RTL internship

• 

  SOC Logic Designer for Intel core based client products
  Intel
  Petach-Tiqwa, Israel
  Verilog System Verilog FPGA RTL

Posted Jun 19, 2022

• 

  Senior Design Verification Engineer
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

Posted Jun 17, 2022

• 

  Client CPU Power and Performance Architect
  Intel
  Haifa, Israel
  FPGA ASIC RTL

Posted Jun 16, 2022

• 

  Physical Design Engineer
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  Fault Isolation Engineer
  Intel
  Santa Clara, United States
  Verilog FPGA RTL

Posted Jun 15, 2022

• 

  Pre-Si Verification/Validation Engineer
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA RTL

• 

  Staff - SoC Design and IP Engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA ASIC RTL

• 

  SOC Design Engineer: Chipsets SOC Front-End Design
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

Posted Jun 11, 2022

• 

  Logic Design Engineer Intern
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL internship

• 

  Physical and Structural Design For CPU Core IP - Graduate Intern
  Intel
  Hillsboro, United States
  VHDL Verilog System Verilog FPGA RTL internship

Posted Jun 10, 2022

• 

  CAD Engineer
  Intel
  Bangalore, India
  Verilog SystemVerilog FPGA ASIC RTL

• 

  Xeon SoC Pre-Si Validation Lead
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

Posted Jun 9, 2022

• 

  FPGA SW Validation Engineer
  Intel
  Bangalore, India
  VHDL Verilog SystemVerilog FPGA ASIC RTL

• 

  Functional Validation Engineer
  Intel
  Guadalajara, Mexico
  VHDL Verilog FPGA RTL

• 

  CPU RTL Design Engineer
  Intel
  Phoenix, United States
  Verilog System Verilog FPGA RTL

Posted Jun 7, 2022

• 

  Pre Silicon HW validation Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  STA Engineer
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  IP Logic Design Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  STA technical Lead
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  Engineering Manager/IP Lead
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  IP Logic Designer
  Intel
  Fort Collins, United States
  Verilog System Verilog SystemVerilog FPGA RTL

• 

  Software Enabling and Optimization FPGA Engineer Intern
  Intel
  Guadalajara, Mexico
  FPGA RTL internship

• 

  CPU Core Logic Designer
  Intel
  Folsom, United States
  VHDL Verilog System Verilog FPGA RTL

• 

  SD Engineer
  Intel
  Bangalore, India
  VHDL Verilog FPGA RTL

• 

  SD Manager
  Intel
  Bangalore, India
  VHDL Verilog FPGA RTL

Posted Jun 5, 2022

• 

  Emulation SW Engineer
  Intel
  Folsom, United States
  Verilog FPGA RTL

• 

  Analog Engineer Intern
  Intel
  Guadalajara, Mexico
  Verilog System Verilog FPGA RTL internship

• 

  Validation Tools Hardware Engineer
  Intel
  Folsom, United States
  Verilog FPGA RTL

• 

  Physical Design Intern
  Intel
  Guadalajara, Mexico
  Verilog System Verilog FPGA RTL internship

• 

  Structural Design Graduate Trainee
  Intel
  Penang, Malaysia
  FPGA ASIC RTL entry level

• 

  GT Functional Val Engg
  Intel
  Bangalore, India
  Verilog System Verilog FPGA ASIC RTL

• 

  Graduate Intern Technical Project Manager
  Intel
  San Jose, United States
  FPGA ASIC RTL internship

• 

  Validation Engineer - Intern
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL internship

• 

  Pre Si Validation Engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

• 

  Chipsets Logic Design Verification Engineer
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

• 

  IP Validation Engineer
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA ASIC RTL

Posted May 28, 2022

• 

  GT Functional Validation Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA ASIC RTL

• 

  IP Logic Microarchitect
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

• 

  Returnship - High Speed CPU Implementation Engineer
  Intel
  Phoenix, United States
  Verilog FPGA RTL

• 

  SOC Design Engineer
  Intel
  Austin, United States
  Verilog System Verilog FPGA ASIC RTL

Posted May 26, 2022

• 

  Emulation Engineer
  Intel
  Bangalore, India
  VHDL Verilog FPGA ASIC RTL

• 

  Staff Verification Engineer
  Intel
  Hyderabad, India
  Verilog System Verilog FPGA RTL

• 

  PDK Dev APR Graduate Trainee
  Intel
  Penang, Malaysia
  FPGA ASIC RTL entry level

• 

  FPGA / Emulation Intern
  Intel
  Guadalajara, Mexico
  FPGA RTL internship

• 

  Memory Design Engineer
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA RTL

• 

  DDR PHY Logic Design Engineer
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

Posted May 25, 2022

• 

  SOC Design Engineer: Chipsets SOC Front-End Design
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  CPU Core Structural Design Engineer
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

Posted May 24, 2022

• 

  Structural Design Engineer for Test Chip Development
  Intel
  Phoenix, United States
  Verilog FPGA RTL

• 

  SoC/IP Pre-Silicon Verification Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  CAD Engineer
  Intel
  Bangalore, India
  VHDL Verilog FPGA RTL

Posted May 23, 2022

• 

  Custom Circuits/Data Path Design Manager
  Intel
  Bangalore, India
  VHDL Verilog FPGA RTL

• 

  Formal verification engineer
  Intel
  Bangalore, India
  Verilog FPGA RTL

• 

  Home2Office Program - Your bridge from a break to a successful career
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  Senior IP Security Logic Design Engineer
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  CORE CPU Pre-Si Validation/Verification Eng
  Intel
  Folsom, United States
  Verilog System Verilog FPGA ASIC RTL

• 

  Advanced Digital SoC Design Integration Engineer
  Intel
  Hillsboro, United States
  FPGA ASIC RTL

• 

  Senior Fault Isolation Engineer
  Intel
  Santa Clara, United States
  Verilog FPGA RTL

• 

  CPU Core Logic Designer
  Intel
  Folsom, United States
  VHDL Verilog System Verilog FPGA RTL

• 

  CPU Core Logic Designer
  Intel
  Folsom, United States
  VHDL Verilog System Verilog FPGA RTL

• 

  SOC Design Engineer: Chipsets SOC Front-End Design
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  SOC Design Engineer: Chipsets SOC Front-End Design
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  Senior IP Logic Design Engineer
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  SoC Design Engineer
  Intel
  Folsom, United States
  FPGA ASIC RTL

• 

  SoC Design Engineer
  Intel
  Folsom, United States
  FPGA ASIC RTL

• 

  RTL Design Engineer
  Intel
  Santa Clara, United States
  FPGA RTL

• 

  CAD Engineer
  Intel
  Bangalore, India
  Verilog FPGA ASIC RTL

• 

  SOC Design Engineer Graduate Internship
  Intel
  Phoenix, United States
  FPGA ASIC RTL internship

• 

  Software Engineer Graduate Trainee
  Intel
  Penang, Malaysia
  Verilog FPGA RTL entry level

• 

  IP Verification Engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

• 

  IP Verification Engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

• 

  FPGA/ Emulation Prototyping Engineer
  Intel
  Bangalore, India
  FPGA RTL

• 

  Analog Engineer
  Intel
  Bangalore, India
  FPGA RTL

• 

  Pre-Silicon verification engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

• 

  IP RTL Logic Design Engineer
  Intel
  Hudson, United States
  Verilog System Verilog FPGA RTL

• 

  Security Engines IP Hardware/AI Architect
  Intel
  Folsom, United States
  VHDL Verilog FPGA RTL

• 

  Pre-Si SoC Verification Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  Principle Engineer/Lead SoC microarchitecture and Logic Design
  Intel
  Pune, India
  Verilog System Verilog FPGA ASIC RTL

• 

  Senior Pre-silicon Emulation Validation Engineer
  Intel
  Pune, India
  FPGA ASIC RTL

• 

  Pre-silicon SoC Emulation Validation Engineer
  Intel
  Pune, India
  FPGA ASIC RTL

• 

  SoC Verification Engineer - Performance Validation
  Intel
  Pune, India
  VHDL Verilog System Verilog FPGA RTL

• 

  Senior SoC Verification Engineer - Performance Validation
  Intel
  Pune, India
  VHDL Verilog System Verilog FPGA RTL

• 

  FPGA Design Application Engineer
  Intel
  Gdansk, Poland
  VHDL Verilog FPGA ASIC RTL

• 

  IP Validation Lead Engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog SystemVerilog FPGA RTL

• 

  IP Logic Design Engineer
  Intel
  Penang, Malaysia
  Verilog FPGA RTL

• 

  Senior Validation Engineer
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

• 

  Staff - SoC Design and IP Engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA ASIC RTL

• 

  Physical Design Engineer
  Intel
  Santa Clara, United States
  FPGA ASIC RTL

• 

  IP Validation Manager/Senior Lead
  Intel
  Penang, Malaysia
  FPGA RTL

• 

  RTL Design Engineer
  Intel
  Bangalore, India
  VHDL Verilog FPGA ASIC RTL

• 

  DFT Design
  Intel
  Bangalore, India
  FPGA RTL

• 

  Pre-Silicon Verification Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA ASIC RTL

Posted May 4, 2022

• 

  Software Application Engineer
  Intel
  Tokyo, Japan
  FPGA ASIC RTL

• 

  Logic Design Undergraduate Intern
  Intel
  Hillsboro, United States
  Verilog FPGA ASIC RTL internship

• 

  High Speed CPU Implementation Engineer
  Intel
  Phoenix, United States
  Verilog FPGA RTL

Posted May 3, 2022

• 

  Pre-Silicon Verification Manager
  Intel
  Bangalore, India
  Verilog SystemVerilog FPGA RTL

• 

  SOC DFx Design Engineer
  Intel
  Ho Chi Minh City, Viet Nam
  Verilog FPGA RTL

Posted May 2, 2022

• 

  RTL Design and Verification Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

Posted Apr 30, 2022

• 

  IP Logic Design Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  Logic Design Engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

• 

  Pre-Silicon verification engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

• 

  Pre-Si Valid/Verif Engineer
  Intel
  Hillsboro, United States
  VHDL Verilog FPGA RTL

• 

  Xeon SoC Emulation/Verification Lead
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA RTL

• 

  Senior Pre-Si Verification Lead
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA ASIC RTL

Posted Apr 29, 2022

• 

  Pre-Si Verification Engineer
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA ASIC RTL

Posted Apr 28, 2022

• 

  EDA Software Engineer
  Intel
  Hillsboro, United States
  Verilog FPGA RTL

Posted Apr 27, 2022

• 

  Graphics Hardware Engineer
  Intel
  Bangalore, India
  Verilog FPGA RTL

• 

  Design Automation Engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

• 

  Pre-Silicon Validation Engineer
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA ASIC RTL

• 

  CPU-SoC Silicon Design Engineering Intern
  Intel
  Kulim, Malaysia
  Verilog System Verilog FPGA RTL internship

Posted Apr 26, 2022

• 

  SoC Design Engineer- Pre-Silicon Validation
  Intel
  Hillsboro, United States
  Verilog FPGA RTL

• 

  TFM Engineer
  Intel
  Bangalore, India
  FPGA ASIC RTL

Posted Apr 25, 2022

• 

  Subsystem Integration Micro-Architect
  Intel
  Penang, Malaysia
  Verilog FPGA RTL

Posted Apr 23, 2022

• 

  Physical Design SoC Lead
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  Pre-Si Verification Engineer
  Intel
  Phoenix, United States
  VHDL Verilog SystemVerilog FPGA RTL

• 

  SoC Verification Engineer
  Intel
  Fort Collins, United States
  VHDL Verilog System Verilog FPGA RTL

• 

  ASIC Formal Verification Co-op
  Intel
  Vancouver, Canada
  Verilog SystemVerilog FPGA ASIC RTL internship

Posted Apr 22, 2022

• 

  Staff Logic Design Engineer
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

• 

  SOC Design Engineer: Chipsets SOC Front-End Design
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  SOC Design Engineer: Chipsets SOC Front-End Design
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

Posted Apr 21, 2022

• 

  Pre-Si Valid/Verif Engineer
  Intel
  Bangalore, India
  VHDL Verilog SystemVerilog FPGA RTL

• 

  SoC DFX Pre-Silicon Verification Lead
  Intel
  Bangalore, India
  FPGA RTL

• 

  Staff Physical Design Engineer
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  Pre-Si Valid/Verif Engineer
  Intel
  Bangalore, India
  VHDL Verilog SystemVerilog FPGA RTL

Posted Apr 20, 2022

• 

  Senior Microprocessor Firmware Architect
  Intel
  Haifa, Israel
  VHDL Verilog FPGA RTL

• 

  Senior SoC Logic Design Engineer
  Intel
  Hyderabad, India
  Verilog System Verilog FPGA RTL

• 

  CPU Core Structural Design Engineer
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

• 

  IP Logic microarchitect
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

Posted Apr 19, 2022

• 

  SoC Design Engineer- Pre-Silicon Validation
  Intel
  Hillsboro, United States
  Verilog SystemVerilog FPGA RTL

• 

  Senior Engineer/Lead SoC microarchitecture and Logic Design
  Intel
  Bangalore, India
  Verilog System Verilog FPGA ASIC RTL

Posted Apr 15, 2022

• 

  AI/ML Logic Design Engineer
  Intel
  Santa Clara, United States
  Verilog FPGA RTL

• 

  IO Validation Engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA ASIC RTL

• 

  Structural Design Manager
  Intel
  Bangalore, India
  VHDL Verilog FPGA RTL

• 

  Pre Si Verification Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  Staff IP System Validation Engineer
  Intel
  Penang, Malaysia
  VHDL Verilog FPGA RTL

• 

  Chipset Emulation Validation Architect
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

Posted Apr 11, 2022

• 

  Firmware Verification (Emulation) Engineer
  Intel
  Petach-Tiqwa, Israel
  Verilog SystemVerilog FPGA RTL

Posted Apr 8, 2022

• 

  SoC Design Undergrad Engineering Intern
  Intel
  Austin, United States
  Verilog System Verilog FPGA RTL internship

• 

  Analog Design Engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

• 

  Intel PSG - Field Applications Engineer
  Intel
  Canada
  VHDL Verilog SystemVerilog FPGA ASIC RTL

Posted Apr 7, 2022

• 

  SoC Validation Execution Engineer
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA ASIC RTL

• 

  Design verification engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

Posted Apr 6, 2022

• 

  IP Verification and Validation Engineer Graduate Trainee
  Intel
  Penang, Malaysia
  VHDL Verilog System Verilog FPGA ASIC RTL entry level

• 

  IP Validation Engineer
  Intel
  Fort Collins, United States
  Verilog System Verilog FPGA ASIC RTL

Posted Apr 5, 2022

• 

  Intel Labs Security Internship
  Intel
  Hillsboro, United States
  FPGA ASIC RTL internship

• 

  IP Logic Validation Graduate Intern
  Intel
  Hillsboro, United States
  VHDL Verilog System Verilog FPGA RTL internship

Posted Apr 2, 2022

• 

  Graduate Trainee
  Intel
  Penang, Malaysia
  FPGA ASIC RTL entry level

Posted Apr 1, 2022

• 

  Senior RTL Designer /uArch lead
  Intel
  Bangalore, India
  FPGA RTL

Posted Mar 31, 2022

• 

  Atom/Quark CPU Validation Graduate Trainee
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL entry level

Posted Mar 30, 2022

• 

  Manager - SoC Design Verification
  Intel
  Penang, Malaysia
  FPGA ASIC RTL

• 

  Analog Engineer
  Intel
  Folsom, United States
  Verilog System Verilog FPGA ASIC RTL

Posted Mar 29, 2022

• 

  Design Verification Engineer
  Intel
  Hyderabad, India
  FPGA RTL

• 

  CPU Core Design Technical - Graduate Intern
  Intel
  Folsom, United States
  Verilog FPGA RTL internship

Posted Mar 26, 2022

• 

  Technical Lead / Senior Verification Engineer
  Intel
  Hudson, United States
  Verilog System Verilog FPGA RTL

Posted Mar 25, 2022

• 

  CPU Arithmetic HW Formal Verification Engineer
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA RTL

• 

  Pre-Silicon Validation Engineer / Lead
  Intel
  Bangalore, India
  FPGA RTL

• 

  Field Applications Engineer
  Intel
  Austin, United States
  VHDL Verilog SystemVerilog FPGA ASIC RTL

• 

  Pre-Si SoC Verification Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  Pre-Si SoC Verification Lead
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

Posted Mar 23, 2022

• 

  Structural (physical) Design Engineer
  Intel
  Austin, United States
  Verilog FPGA RTL

• 

  IP Verification Engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA RTL

• 

  Analog Engineer Intern
  Intel
  Phoenix, United States
  Verilog FPGA RTL internship

• 

  Staff Chipsets Logic RTL Designer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  Structural Design Engineer
  Intel
  Penang, Malaysia
  FPGA ASIC RTL

Posted Mar 22, 2022

• 

  CPU-SoC Silicon Design Engineering Intern
  Intel
  Kulim, Malaysia
  Verilog System Verilog FPGA RTL internship

• 

  Xeon SOC Design Engineering - Graduate Intern
  Intel
  Santa Clara, United States
  Verilog FPGA RTL internship

Posted Mar 19, 2022

• 

  Staff Verification Engineer
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

Posted Mar 18, 2022

• 

  FPGA IP Design Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA ASIC RTL

• 

  SoC Design Engineer (Evergreen)
  Intel
  Atlanta, United States
  Verilog System Verilog FPGA RTL

• 

  Pre-Silicon Logic Design Engineer (Evergreen)
  Intel
  Atlanta, United States
  Verilog SystemVerilog FPGA RTL

Posted Mar 17, 2022

• 

  SoC Design Engineer
  Intel
  San Jose, Costa Rica
  Verilog System Verilog FPGA RTL

• 

  Pre-Silicon Validation Engineer (Evergreen)
  Intel
  Atlanta, United States
  FPGA RTL

Posted Mar 16, 2022

• 

  Chipset Logic Design Engineer
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

• 

  Chipset Logic Design Verification Engineer
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

Posted Mar 15, 2022

• 

  Design Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  Graphics Hardware Engineer
  Intel
  Bangalore, India
  FPGA RTL

• 

  SoC Logic Design Engineer
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA ASIC RTL

Posted Mar 10, 2022

• 

  FPGA IP Software Development Engineer
  Intel
  Bangalore, India
  VHDL Verilog System Verilog FPGA RTL

• 

  System Software Engineer Intern
  Intel
  Santa Clara, United States
  Verilog FPGA RTL internship

Posted Mar 9, 2022

• 

  SoC Design Engineer DFT
  Intel
  Chandler, United States
  FPGA ASIC RTL

• 

  Pre-Si Verification Engineer
  Intel
  San Jose, United States
  Verilog SystemVerilog FPGA ASIC RTL

Posted Mar 8, 2022

• 

  CIT RTL Verification
  Intel
  Folsom, United States
  Verilog System Verilog FPGA RTL

Posted Mar 7, 2022

• 

  Software Engineer Graduate Trainee
  Intel
  Penang, Malaysia
  Verilog FPGA RTL entry level

• 

  Sr. E-Core CPU Physical Design & Verification CAD Engineer – RTL2GDS Standard Cell Level Flows
  Intel
  Austin, United States
  FPGA RTL

• 

  Security Architect
  Intel
  Folsom, United States
  FPGA ASIC RTL

Posted Mar 5, 2022

• 

  Xeon SoC Structural Design Intern - Undergraduate
  Intel
  Hudson, United States
  Verilog FPGA RTL internship

Posted Mar 4, 2022

• 

  Software Application Engineer � Ethernet Switch
  Intel
  Bangalore, India
  FPGA ASIC RTL

• 

  Pre-Si Verification Engineer
  Intel
  Bangalore, India
  FPGA RTL

• 

  Xeon SoC Pre-Silicon Validation - Undergrad Intern
  Intel
  Hudson, United States
  Verilog SystemVerilog FPGA ASIC RTL internship

• 

  IP Verification Graduate Trainee
  Intel
  Penang, Malaysia
  VHDL Verilog FPGA RTL entry level

Posted Mar 1, 2022

• 

  Graduate IP Design Intern
  Intel
  Hudson, United States
  VHDL Verilog System Verilog FPGA ASIC RTL internship

Posted Feb 27, 2022

• 

  Intel Design Automation Engineer for E-core Microprocessor Tools & Flows
  Intel
  Austin, United States
  Verilog System Verilog FPGA RTL

Posted Feb 24, 2022

• 

  Graduate Internship - Graphics Hardware Engineer
  Intel
  Chandler, United States
  Verilog System Verilog FPGA RTL internship

• 

  Undergraduate Internship - Graphics Hardware Engineer
  Intel
  Chandler, United States
  Verilog System Verilog FPGA RTL internship

Posted Feb 19, 2022

• 

  Front End Design Automation Engineer
  Intel
  Chandler, United States
  Verilog System Verilog FPGA ASIC RTL

Posted Feb 18, 2022

• 

  SoC Design Engineer
  Intel
  San Jose, United States
  FPGA ASIC RTL

Posted Feb 17, 2022

• 

  Software Engineer - EDA Validation
  Intel
  Folsom, United States
  VHDL Verilog System Verilog FPGA RTL

• 

  SoC Design Engineer Intern
  Intel
  Hillsboro, United States
  ASIC RTL FPGA internship

Posted Feb 16, 2022

• 

  DSP Technology Specialist FAE
  Intel
  Bernardsville, United States
  VHDL Verilog System Verilog FPGA RTL

Posted Feb 15, 2022

• 

  Custom-Logic IP Solutions Engineering (CISE) Graduate Trainee
  Intel
  Penang, Malaysia
  entry level FPGA RTL System Verilog VHDL Verilog

Posted Feb 11, 2022

• 

  ASIC / IP Engineer (Home based office/Katowice/Gdansk)
  Intel
  Gdansk, Poland
  Verilog System Verilog FPGA ASIC RTL

Posted Feb 9, 2022

• 

  Senior ASIC Physical Design Engineer
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA ASIC RTL

Posted Jan 30, 2022

• 

  CPU-SoC Silicon Design Engineering Intern
  Intel
  Kulim, Malaysia
  FPGA RTL internship System Verilog Verilog

Posted Jan 27, 2022

• 

  RTL Design and Validation Engineer
  Intel
  San Jose, Costa Rica
  Verilog System Verilog FPGA RTL

• 

  CPU-SoC DFX Pre-Si Validation Engineer
  Intel
  Penang, Malaysia
  Verilog System Verilog FPGA RTL

• 

  Graphics Hardware Engineer
  Intel
  Swindon, Primary Location: Swindon, UK
  VHDL Verilog FPGA RTL

• 

  DFx Verification Engineer
  Intel
  Austin, United States
  Verilog System Verilog FPGA RTL

Posted Dec 8, 2021

• 

  Sr. Pre-Silicon Validation Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA ASIC RTL

• 

  Verification Student
  Intel
  Haifa, Israel
  entry level FPGA SystemVerilog RTL internship Verilog

• 

  Logic Design Student
  Intel
  Haifa, Israel
  entry level FPGA RTL internship VHDL Verilog

• 

  Sr. Pre-Si Verification Engineer
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  CORE CPU Pre-Si Validation/Verification Intern
  Intel
  Folsom, United States
  FPGA RTL internship System Verilog ASIC VHDL Verilog

• 

  CPU Core Backend Integration Intern
  Intel
  Folsom, United States
  FPGA RTL internship System Verilog Verilog

• 

  CPU Core Structural Design Intern
  Intel
  Folsom, United States
  FPGA RTL internship System Verilog Verilog

• 

  Logic Designer for Processor Datapath Design Intern
  Intel
  Allentown, United States
  FPGA RTL internship System Verilog Verilog

• 

  Pre Silicon Verification
  Intel
  Bangalore, India
  Verilog System Verilog FPGA RTL

• 

  Undergraduate IP Design Intern
  Intel
  Hudson, United States
  FPGA RTL internship System Verilog ASIC VHDL Verilog

• 

  CPU RTL Design Engineer
  Intel
  Hillsboro, United States
  Verilog System Verilog FPGA RTL

• 

  Lead Verification Engineer
  Intel
  Santa Clara, United States
  Verilog System Verilog FPGA ASIC RTL

• 

  SOC Design Engineer
  Intel
  Penang, Malaysia
  VHDL Verilog FPGA ASIC RTL

• 

  SOC FPGA DFT Engineer
  Intel
  Penang, Malaysia
  VHDL Verilog FPGA RTL

• 

  Xeon SoC Pre-Silicon Validation - Undergraduate Intern
  Intel
  Fort Collins, United States
  FPGA RTL internship System Verilog ASIC Verilog

• 

  Xeon SoC Pre-Silicon Validation - Graduate Intern
  Intel
  Fort Collins, United States
  FPGA RTL internship System Verilog ASIC Verilog

• 

  Pre-silicon Verification Engineer
  Intel
  Hudson, United States
  Verilog System Verilog FPGA RTL