Posted Oct 1, 2022

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  SOC DFT Engineer (Silicon Engineering)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  Verilog SystemVerilog FPGA ASIC RTL

• 

  SOC DFT Engineer (Silicon Engineering)
  SpaceX
  Mountain View, CA, United States, Mountain View, CA, United States
  Verilog SystemVerilog FPGA ASIC RTL

• 

  SOC DFT Engineer (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  Verilog SystemVerilog FPGA ASIC RTL

Posted Sep 29, 2022

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  Digital FPGA/ASIC Validation Engineer (Silicon Engineering)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  FPGA ASIC

• 

  DSP Verification Engineer (Silicon Engineering)
  SpaceX
  Mountain View, CA, United States, Mountain View, CA, United States
  FPGA ASIC RTL

• 

  DSP Verification Engineer (Silicon Engineering)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  FPGA ASIC RTL

• 

  FPGA/ASIC Design Engineer (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  Verilog SystemVerilog FPGA ASIC

• 

  FPGA/ASIC Design Engineer (Silicon Engineering)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  Verilog SystemVerilog FPGA ASIC

• 

  FPGA Engineer, DSP (Satellites)
  SpaceX
  Hawthorne, CA or Redmond, WA, Hawthorne, CA or Redmond, WA
  VHDL Verilog SystemVerilog FPGA ASIC RTL

• 

  FPGA Engineer (Satellites)
  SpaceX
  Hawthorne, CA or Redmond, WA, Hawthorne, CA or Redmond, WA
  VHDL FPGA ASIC

• 

  New Graduate, Silicon Engineer
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  VHDL Verilog SystemVerilog FPGA ASIC RTL entry level

• 

  New Graduate, Silicon Engineer
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  VHDL Verilog SystemVerilog FPGA ASIC RTL entry level

• 

  New Graduate, Silicon Engineer
  SpaceX
  Irvine, CA or Redmond, WA, Irvine, CA or Redmond, WA
  VHDL Verilog SystemVerilog FPGA ASIC RTL entry level

• 

  New Graduate, Silicon Engineer
  SpaceX
  Hawthorne, CA, United States, Hawthorne, CA, United States
  VHDL Verilog SystemVerilog FPGA ASIC RTL entry level

• 

  Spring 2023 Associate Engineer - Post Grad
  SpaceX
  Flexible - Any SpaceX Site, Flexible - Any SpaceX Site
  Verilog SystemVerilog FPGA ASIC

• 

  Spring 2023 Engineering Internship/Co-op
  SpaceX
  Flexible - Any SpaceX Site, Flexible - Any SpaceX Site
  Verilog SystemVerilog FPGA ASIC internship

• 

  Spring 2023 Software Engineering Internship/Co-op
  SpaceX
  Flexible - Any SpaceX Site, Flexible - Any SpaceX Site
  Verilog SystemVerilog FPGA ASIC internship

• 

  Sr. DSP Engineer
  SpaceX
  Hawthorne, CA, United States, Hawthorne, CA, United States
  FPGA ASIC RTL

• 

  Sr. FPGA Engineer (Satellites)
  SpaceX
  Hawthorne, CA or Redmond, WA, Hawthorne, CA or Redmond, WA
  VHDL FPGA ASIC

• 

  Summer 2023 Associate Engineer - Post Grad
  SpaceX
  Flexible - Any SpaceX Site, Flexible - Any SpaceX Site
  Verilog SystemVerilog FPGA ASIC

• 

  Summer 2023 Engineering Internship/Co-op
  SpaceX
  Flexible - Any SpaceX Site, Flexible - Any SpaceX Site
  Verilog SystemVerilog FPGA ASIC internship

• 

  Summer 2023 Software Engineering Internship/Co-op
  SpaceX
  Flexible - Any SpaceX Site, Flexible - Any SpaceX Site
  Verilog SystemVerilog FPGA ASIC internship

Posted Jul 28, 2022

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  Sr. DSP Communication Systems Engineer
  SpaceX
  Hawthorne, CA, United States, Hawthorne, CA, United States
  FPGA ASIC RTL

Posted Jul 22, 2022

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  Sr. SOC Physical Design STA/Timing Engineer (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  Verilog System Verilog ASIC

• 

  Sr. SOC Physical Design STA/Timing Engineer (Silicon Engineering)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  Verilog System Verilog ASIC

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  Sr. SOC Physical Design STA/Timing Engineer (Silicon Engineering)
  SpaceX
  Mountain View, CA, United States, Mountain View, CA, United States
  Verilog System Verilog ASIC

Posted Jul 21, 2022

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  Principal SOC Physical Design STA/Timing Engineer (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  Verilog System Verilog ASIC

• 

  Principal SOC Physical Design STA/Timing Engineer (Silicon Engineering)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  Verilog System Verilog ASIC

• 

  Principal SOC Physical Design STA/Timing Engineer (Silicon Engineering)
  SpaceX
  Mountain View, CA, United States, Mountain View, CA, United States
  Verilog System Verilog ASIC

Posted Jun 18, 2022

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  FPGA Engineer (Avionics)
  SpaceX
  Hawthorne, CA, United States, Hawthorne, CA, United States
  VHDL Verilog SystemVerilog FPGA ASIC RTL

Posted Jun 15, 2022

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  SOC Physical Design STA/Timing Engineer (Silicon Engineering)
  SpaceX
  Mountain View, CA, United States, Mountain View, CA, United States
  Verilog System Verilog ASIC

• 

  SOC Physical Design STA/Timing Engineer (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  Verilog System Verilog ASIC

• 

  SOC Physical Design STA/Timing Engineer (Silicon Engineering)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  Verilog System Verilog ASIC

• 

  Sr. Physical Design Engineer, Top Level (Silicon Engineering)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  Verilog System Verilog ASIC

• 

  Sr. Physical Design Engineer, Top Level (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  Verilog System Verilog ASIC

• 

  Sr. Physical Design Engineer, Top Level (Silicon Engineering)
  SpaceX
  Mountain View, CA, United States, Mountain View, CA, United States
  Verilog System Verilog ASIC

Posted May 28, 2022

• 

  DSP Verification Engineer (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  FPGA ASIC RTL

Posted May 27, 2022

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  Sr. SOC Synthesis & Front-End STA Engineer (Silicon Engineering)
  SpaceX
  Mountain View, CA, United States, Mountain View, CA, United States
  Verilog SystemVerilog ASIC RTL

Posted May 24, 2022

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  Design Verification Engineer (Silicon Engineering)
  SpaceX
  Mountain View, CA, United States, Mountain View, CA, United States
  FPGA ASIC RTL

Posted May 19, 2022

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  Design Verification Engineer
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  FPGA ASIC RTL

• 

  Design Verification Engineer
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  ASIC RTL

Posted May 18, 2022

• 

  ASIC/FPGA Design Engineer - DSP (Starlink)
  SpaceX
  Mountain View, CA, United States, Mountain View, CA, United States
  VHDL Verilog SystemVerilog FPGA ASIC RTL

Posted May 10, 2022

• 

  Software Engineer, Silicon Platform (Starlink)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  VHDL Verilog SystemVerilog FPGA ASIC

Posted Apr 19, 2022

• 

  Sr. Digital ASIC/FPGA Validation Engineer (Starlink)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  FPGA ASIC

• 

  Sr. Digital ASIC/FPGA Validation Engineer (Starlink)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  FPGA ASIC

Posted Apr 8, 2022

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  ASIC/FPGA Design Engineer - DSP (Starlink)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  VHDL Verilog SystemVerilog FPGA ASIC RTL

Posted Mar 28, 2022

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  Sr. Design Verification Engineer
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  FPGA ASIC RTL

• 

  Sr. Design Verification Engineer
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  FPGA ASIC RTL

Posted Feb 9, 2022

• 

  ASIC/FPGA Design Engineer - DSP (Starlink)
  SpaceX
  Irvine, United States
  VHDL Verilog SystemVerilog FPGA ASIC RTL

• 

  Sr. ASIC/FPGA Design Engineer
  SpaceX
  Redmond, United States
  Verilog SystemVerilog FPGA ASIC

• 

  Sr. ASIC/FPGA Design Engineer
  SpaceX
  Irvine, United States
  Verilog SystemVerilog FPGA ASIC

Posted Jan 27, 2022

• 

  Sr. SOC Synthesis & Front-End STA Engineer (Starlink)
  SpaceX
  Redmond, United States
  Verilog SystemVerilog ASIC RTL

• 

  Sr. SOC Synthesis & Front-End STA Engineer (Starlink)
  SpaceX
  Irvine, United States
  Verilog SystemVerilog ASIC RTL