Posted Jul 22, 2022

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  Sr. SOC Physical Design STA/Timing Engineer (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  Verilog System Verilog ASIC

Posted Jul 21, 2022

• 

  Principal SOC Physical Design STA/Timing Engineer (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  Verilog System Verilog ASIC

Posted Jun 15, 2022

• 

  SOC Physical Design STA/Timing Engineer (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  Verilog System Verilog ASIC

• 

  Sr. Physical Design Engineer, Top Level (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  Verilog System Verilog ASIC

Posted May 28, 2022

• 

  DSP Verification Engineer (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  FPGA ASIC RTL

Posted May 19, 2022

• 

  Design Verification Engineer
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  ASIC RTL

Posted Apr 19, 2022

• 

  Sr. Digital ASIC/FPGA Validation Engineer (Starlink)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  FPGA ASIC

Posted Mar 28, 2022

• 

  Sr. Design Verification Engineer
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  FPGA ASIC RTL

Posted Mar 23, 2022

• 

  FPGA/ASIC Design Engineer (Starlink)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  Verilog SystemVerilog FPGA ASIC