12 open FPGA & RTL jobs at Samsung Semiconductor

12 open logic design roles at Samsung Semiconductor.

ASIC jobs DFT jobs FPGA jobs RTL jobs SOC jobs STA jobs SystemVerilog jobs UVM jobs Verification jobs Verilog jobs California

Principal Engineer, SOC Design

Samsung Semiconductor San Jose, California

ASIC RTL

11d

Staff Engineer, DRAM

Samsung Semiconductor San Jose, California

ASIC RTL

13d

Senior Engineer, Physical Design AI/ML

Samsung Semiconductor San Jose, California

RTL Place and Route

14d

Senior RTL Engineer, IO Die and Interconnect IP

Samsung Semiconductor San Jose, California

Verilog SystemVerilog

24d

Senior RTL Engineer, Memory Centric Computing

Samsung Semiconductor San Jose, California

Verilog System Verilog

25d

Senior Physical Design Engineer

Samsung Semiconductor San Jose, California

ASIC RTL

25d

Senior Emulation Engineer

Samsung Semiconductor San Jose, California

Verilog SystemVerilog

25d

Senior HSIO Digital Design Engineer

Samsung Semiconductor San Jose, California

Digital Design SOC

1mo

Principal Engineer, SOC Integration

Samsung Semiconductor San Jose, California

ASIC Static Timing

1mo

Senior Staff Engineer - Systems

Samsung Semiconductor San Jose, California

FPGA ASIC

1mo

Senior Staff Engineer, Design Verification

Samsung Semiconductor San Jose, California

Verilog System Verilog

1mo

Director, Design Verification

Samsung Semiconductor San Jose, California

SystemVerilog ASIC

1mo

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