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Staff Engineer, ASIC Design Verification

Micron Hyderabad, Telangana

Verilog System Verilog

Staff FPGA Digital Design Engineer Level 5 (AHT)

Northrop Grumman Northridge, California

VHDL Verilog

2027 Associate/ Digital Engineer - Rolling Meadows IL

Northrop Grumman Rolling Meadows, Illinois

FPGA SOC

Design Engineer Intern

Marvell Yokneam

RTL SOC

Principal Embedded Firmware Engineer - Networking PAM4 DSP/ODSP/AEC/MicroLED

Marvell Santa Clara, California

Verilog FPGA

Senior Staff Digital Design Engineer

Marvell Irvine, California

Verilog SystemVerilog

Principal Hardware Engineer - 3rd Party IP Engineer

Marvell Multiple locations

ASIC Synthesis

Senior IC verification engineer

NXP Semiconductors Leuven, Flanders

SystemVerilog RTL

Principal System Engineer

NXP Semiconductors Leuven, Flanders

Verilog SystemVerilog

NFC FW Architect

NXP Semiconductors Bangalore, India

FPGA RTL

SoC Verification Engineer

NXP Semiconductors Bangalore, India

Verilog System Verilog

SoC Verification Engineer

NXP Semiconductors Bangalore, India

Verilog System Verilog

SoC Verification Senior Lead Engineer

NXP Semiconductors Bangalore, India

Verilog SystemVerilog

FY27 Intern - Applied AI Engineering Intern (Hardware Systems) - Canada (16 months)

Qualcomm Markham, Ontario

Verilog SystemVerilog

FY27 Intern - Camera Design Implementation Intern - Canada (16 months)

Qualcomm Markham, Ontario

ASIC RTL

Sr Staff CPU Server Physical Design Engineer

Qualcomm Santa Clara, California

VHDL Verilog

FY27 Intern - Edge AI and Display Hardware Architecture Development Engineering Internship - Canada (16 months)

Qualcomm Markham, Ontario

VHDL Verilog

Application Engineer, Sr Staff

Qualcomm Toronto, Ontario

ASIC SOC

Camera IP Verification - Sr Lead Engineer

Qualcomm Bangalore, India

SystemVerilog ASIC

Senior Digital Design Verification Engineer GPU Hardware - Athens or Patra, Greece

Qualcomm Maroúsi, Attica Region

SystemVerilog FPGA

Digital Verification Engineer - Athens or Patra, Greece

Qualcomm Maroúsi, Attica Region

SystemVerilog FPGA

Staff Digital Verification Engineer GPU Hardware Design - Athens or Patra, Greece

Qualcomm Maroúsi, Attica Region

SystemVerilog FPGA

System Performance Architect

Qualcomm San Diego, California

ASIC SOC

PMIC Design Engineer, Staff

Qualcomm Tempe, Arizona

VHDL Verilog

SOC Power Design - Staff

Qualcomm Hyderabad, Telangana

FPGA Verification

IP Micro-architect (RTL) design Engineer

Qualcomm Bangalore, India

Verilog SystemVerilog

Product Engineering

Qualcomm Tijuana, Baja California

DFT Design for Test

VLSI Software Engineer

Qualcomm Tijuana, Baja California

ASIC RTL

Senior Staff SoC Design Verification Engineer

Qualcomm Ho Chi Minh City, Hồ Chí Minh

SystemVerilog FPGA

Senior ATE Test Development Engineer, Digital

Qualcomm Singapore, Central Singapore

DFT Design for Test

Scaled Synthesis and Processing Technician

AeroVironment WPAFB

Synthesis

Senior Engineer II-Digital Design

Microchip Technology Multiple locations

RTL Digital Design

Senior Engineer I - Digital Verification

Microchip Technology Multiple locations

Verilog SystemVerilog

Senior Engineer, Product Engineering (Prod Dev)

Analog Devices Philippines, Cavite (jp)

VHDL Verilog

Staff Engineer, Systems Design/Architecture Engineering

Analog Devices Multiple locations

RTL SOC

AMS Design Verification Intern

Analog Devices Milan, Lombardy

Verilog System Verilog

Digital Design Engineering Intern

Analog Devices Milan, Lombardy

Verilog System Verilog

CPU Senior Timing Engineer

Intel Bangalore, India

RTL STA

CPU Physical Design Engineer

Intel Bangalore, India

VHDL Verilog

Core Design Verification Engineer

Intel Penang, Malaysia

Verilog System Verilog

Platform Integration Engineer

Intel Santa Clara, California

SystemVerilog RTL

APTM Yield Analysis/Device Engineer

Intel Albuquerque, Mexico

Synthesis DFT

ASIC Design Engineer

HPE Juniper Networks Bengaluru, Karnataka

VHDL Verilog

Senior Silicon Validation Engineer

IonQ Oxford, England

FPGA ASIC

Senior ASIC Design Engineer - DSP/Analog/SerDes

Celero Communications, Inc. Ottawa, Ontario

Verilog SystemVerilog

Senior ASIC Design Engineer - DSP/Analog/SerDes

Celero Communications, Inc. Irvine, California

Verilog SystemVerilog

Senior ASIC Design Engineer - DSP/Analog/SerDes

Celero Communications, Inc. San Jose, California

Verilog SystemVerilog

Post-Silicon Validation Engineer (Multiple Levels)

Celero Communications, Inc. Multiple locations

ASIC RTL

Research Engineer, Chip Design RL

Anthropic San Francisco, California

FPGA ASIC

Staff Embedded Graphics Software

Ambiq Micro, Inc. Austin, Texas

FPGA SOC

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