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Senior VLSI ASIC Logic Design Engineer

HPE Juniper Networks Multiple locations

FPGA ASIC

Senior VLSI ASIC Logic Design Engineer

HPE Juniper Networks Multiple locations

FPGA ASIC

Senior DRAM RTL design engineer

Micron Hyderabad, Telangana

ASIC RTL

PRINCIPAL ENGINEER, ASIC DESIGN

Micron Hyderabad, Telangana

Verilog System Verilog

PRINCIPAL ENGINEER, ASIC DESIGN

Micron Hyderabad, Telangana

Verilog System Verilog

PRINCIPAL ENGINEER, ASIC DESIGN

Micron Hyderabad, Telangana

Verilog System Verilog

Senior Engineer, DPG LPDDR Verification

Micron Hyderabad, Telangana

Verilog System Verilog

Senior/Principal Design Automation Engineer, Simulation

Micron Jalisco, Chiapas

STA Static Timing

Senior Engineer CAD, Physical Verification

Micron Jalisco, Chiapas

Verification

Senior Engineer CAD, Physical Verification

Micron Jalisco, Chiapas

Verification

Senior Robotics Verification & Validation (V&V) Engineering Manager

Johnson & Johnson Boston, Massachusetts

Verification

Test Development Engineer

Broadcom Singapore, Central Singapore

DFT Design for Test

Test Development Engineer

Broadcom Singapore, Central Singapore

DFT Design for Test

Test Development Engineer

Broadcom Singapore, Central Singapore

DFT Design for Test

Test Development Engineer

Broadcom Singapore, Central Singapore

DFT Design for Test

Senior Physical Design Engineer

Broadcom San Jose, California

ASIC RTL

Senior Verification Engineer - HSIO Unit Level

NVIDIA Multiple locations

FPGA UVM

ASIC Design Engineer, BOOT and Power Management

NVIDIA Multiple locations

RTL Digital Design

Build and Release Methodology Engineer

NVIDIA Bengaluru, Karnataka

Verilog System Verilog

Senior ASIC Verification Engineer - GPU

NVIDIA Santa Clara, California

SystemVerilog ASIC

Formal Verification Engineer - New College Grad 2027

NVIDIA Santa Clara, California

Verilog System Verilog

RFIC System Engineer

Apple San Francisco, California

RTL SOC

RFIC System Engineer

Apple San Francisco, California

RTL SOC

SOC Design Verification Engineer

Apple Multiple Locations

Verilog SystemVerilog

SOC Design Verification Engineer

Apple Multiple Locations

Verilog SystemVerilog

MAC Design Verification Engineer

Apple Multiple Locations

Verilog SystemVerilog

Wireless MAC Design Verification Engineer

Apple Multiple Locations

Verilog SystemVerilog

SOC Design Verification Engineer

Qualcomm San Diego, California

ASIC RTL

Analog Mixed Signal/Power Management Design Engineer (Sr up to Staff)

Qualcomm San Diego, California

VHDL Verilog

CPU Physical Electrical Analysis Engineer

Qualcomm Austin, Texas

STA Place and Route

GPU HLM Engineer - Cork, Ireland

Qualcomm Cork, Munster

ASIC RTL

Staff Engineer - Pre/Post Si validation

Qualcomm Noida, Uttar Pradesh

ASIC SOC

ASICS Design Engineer, Principal

Qualcomm Hsinchu City, Taiwan

ASIC RTL

GPU Compiler Engineer - Cambridge, UK

Qualcomm Cambridge, England

ASIC RTL

SOC Implementation Engineer, Lead

Qualcomm Hyderabad, Telangana

FPGA RTL

CPU Design - Sr Engineer

Qualcomm Bangalore, India

VHDL Verilog

CPU Design - Sr Engineer

Qualcomm Bangalore, India

VHDL Verilog

Lead Engineer - CAD Physical Verification

Silicon Labs Hyderabad, Telangana

SOC Verification

Sr Principal Agile Product Owner – Verification PO (26-384)

Northrop Grumman Springs, Colorado

Verification

Design Engineer, Digital IP

NXP Semiconductors Bangalore, India

RTL Logic Design

Senior DFT Designer

NXP Semiconductors Bangalore, India

VHDL Verilog

Principal Engineer-Design (SoC Integration and RTL/IP)

Microchip Technology Bangalore, India

SystemVerilog FPGA

Principal Engineer - Verification

Microchip Technology Multiple locations

Verilog SystemVerilog

SoC Design Engineer

Microchip Technology Burnaby, British Columbia

FPGA ASIC

Staff Engineer, Digital Design Engineering

Analog Devices Valencia, Valencia

Verilog SystemVerilog

Analog Mixed-Signal IC Design Engineer (Custom Digital Timing Characterization and Liberty Modeling) – TeraWave

Blue Origin San Diego, California

Verilog SystemVerilog

Sr. Embedded Software Engineer

Blue Origin Huntsville, Alabama

VHDL Verilog

Sr. Electrical Engineer, User Terminals - TeraWave

Blue Origin Multiple locations

FPGA ASIC

Physical Design Automation Engineer

Intel Bangalore, India

RTL Digital Design

CPU Design Verification Engineer

Intel Penang, Malaysia

Verilog System Verilog

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