Posted Oct 1, 2022

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  SOC DFT Engineer (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  Verilog SystemVerilog FPGA ASIC RTL

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  SOC DFT Engineer (Silicon Engineering)
  SpaceX
  Mountain View, CA, United States, Mountain View, CA, United States
  Verilog SystemVerilog FPGA ASIC RTL

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  SOC DFT Engineer (Silicon Engineering)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  Verilog SystemVerilog FPGA ASIC RTL

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  Senior Logic Design Engineer
  SiFive
  Bengaluru, Karnataka, India, Bengaluru, Karnataka, India
  Verilog FPGA ASIC

Posted Sep 29, 2022

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  Principal Design Verification Engineer
  Two Six Technologies
  Arlington, Virginia, Arlington, Virginia
  VHDL Verilog RTL

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  Summer 2023 Software Engineering Internship/Co-op
  SpaceX
  Flexible - Any SpaceX Site, Flexible - Any SpaceX Site
  Verilog SystemVerilog FPGA ASIC internship

• 

  Summer 2023 Engineering Internship/Co-op
  SpaceX
  Flexible - Any SpaceX Site, Flexible - Any SpaceX Site
  Verilog SystemVerilog FPGA ASIC internship

• 

  Summer 2023 Associate Engineer - Post Grad
  SpaceX
  Flexible - Any SpaceX Site, Flexible - Any SpaceX Site
  Verilog SystemVerilog FPGA ASIC

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  Sr. FPGA Engineer (Satellites)
  SpaceX
  Hawthorne, CA or Redmond, WA, Hawthorne, CA or Redmond, WA
  VHDL FPGA ASIC

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  Sr. DSP Engineer
  SpaceX
  Hawthorne, CA, United States, Hawthorne, CA, United States
  FPGA ASIC RTL

• 

  Spring 2023 Software Engineering Internship/Co-op
  SpaceX
  Flexible - Any SpaceX Site, Flexible - Any SpaceX Site
  Verilog SystemVerilog FPGA ASIC internship

• 

  Spring 2023 Engineering Internship/Co-op
  SpaceX
  Flexible - Any SpaceX Site, Flexible - Any SpaceX Site
  Verilog SystemVerilog FPGA ASIC internship

• 

  Spring 2023 Associate Engineer - Post Grad
  SpaceX
  Flexible - Any SpaceX Site, Flexible - Any SpaceX Site
  Verilog SystemVerilog FPGA ASIC

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  New Graduate, Silicon Engineer
  SpaceX
  Hawthorne, CA, United States, Hawthorne, CA, United States
  VHDL Verilog SystemVerilog FPGA ASIC RTL entry level

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  New Graduate, Silicon Engineer
  SpaceX
  Irvine, CA or Redmond, WA, Irvine, CA or Redmond, WA
  VHDL Verilog SystemVerilog FPGA ASIC RTL entry level

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  New Graduate, Silicon Engineer
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  VHDL Verilog SystemVerilog FPGA ASIC RTL entry level

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  New Graduate, Silicon Engineer
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  VHDL Verilog SystemVerilog FPGA ASIC RTL entry level

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  FPGA Engineer (Satellites)
  SpaceX
  Hawthorne, CA or Redmond, WA, Hawthorne, CA or Redmond, WA
  VHDL FPGA ASIC

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  FPGA Engineer, DSP (Satellites)
  SpaceX
  Hawthorne, CA or Redmond, WA, Hawthorne, CA or Redmond, WA
  VHDL Verilog SystemVerilog FPGA ASIC RTL

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  FPGA/ASIC Design Engineer (Silicon Engineering)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  Verilog SystemVerilog FPGA ASIC

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  FPGA/ASIC Design Engineer (Silicon Engineering)
  SpaceX
  Irvine, CA, United States, Irvine, CA, United States
  Verilog SystemVerilog FPGA ASIC

• 

  DSP Verification Engineer (Silicon Engineering)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  FPGA ASIC RTL

• 

  DSP Verification Engineer (Silicon Engineering)
  SpaceX
  Mountain View, CA, United States, Mountain View, CA, United States
  FPGA ASIC RTL

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  Digital FPGA/ASIC Validation Engineer (Silicon Engineering)
  SpaceX
  Redmond, WA, United States, Redmond, WA, United States
  FPGA ASIC

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  RTL Design Engineer, IP
  SiFive
  Bengaluru, Karnataka, India, Bengaluru, Karnataka, India
  VHDL Verilog System Verilog RTL

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  RTL Design Director - Interconnect/Uncore
  SiFive
  San Mateo, California, United States, San Mateo, California, United States
  RTL

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  Principal RTL Design Engineer, RISC-V CPU Functional Safety
  SiFive
  Cambridge, England, United Kingdom, Cambridge, England, United Kingdom
  VHDL Verilog System Verilog ASIC RTL

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  Performance Architecture - Workload Characterization, Analysis & Tuning
  SiFive
  Austin, Texas, United States, Austin, Texas, United States
  FPGA ASIC RTL

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  Performance Architect
  SiFive
  Austin, Texas, United States, Austin, Texas, United States
  VHDL Verilog FPGA ASIC RTL

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  IP Verification Engineer
  SiFive
  Bengaluru, Karnataka, India, Bengaluru, Karnataka, India
  Verilog System Verilog RTL