yesterday

Principal Engineer - Verification

Microchip Technology Chennai, Tamil Nadu

21h

Senior Technical Staff Engineer - Analog & Mixed Signal Design

Microchip Technology Bangalore, India

Verilog SystemVerilog

21h

Senior Manager- SOC Verification

Microchip Technology Chandler, Arizona

SystemVerilog RTL

21h

Technical Staff Engineer - Verification

Microchip Technology Hyderabad, Telangana

VHDL Verilog

21h

PCB Layout Design Engineer

Northrop Grumman Woodland Hills, California

DFT Design for Test

21h

Principal Electrical Engineer (FPGA Design Engineer)

Northrop Grumman San Diego, California

FPGA UVM

21h

Electrical Engineer – Integrated Analog/Digital Design Level 3 /4

Northrop Grumman Sunnyvale, California

FPGA Digital Design

21h

Digital ASIC Design Engineer

Draper Cambridge, Massachusetts

VHDL Verilog

22h

Physical Design Engineer

Qualcomm Santa Clara, California

ASIC RTL

22h

Senior Hardware Engineer - SoC Architecture & Design - Qualcomm - Grenoble, France

Qualcomm Grenoble, Auvergne-Rhône-Alpes

ASIC RTL

22h

SOC Design Verification Sr Engineer

Qualcomm Bangalore, India

ASIC RTL

22h

NPI Program Manager (Staff)

Qualcomm Santa Clara, California

ASIC DFT

22h

Peripherals (Ethernet) Validation Engineer – Senior Engineer

Qualcomm Bangalore, India

ASIC SOC

22h

CPU Firmware Verification and Validation Engineer

Qualcomm Bangalore, India

22h

Senior Staff Engineer - Microcontroller Sub-System Design

Qualcomm Cork, Munster

ASIC RTL

22h

NPU Design Verification Sr Engineer

Qualcomm Bangalore, India

Verilog SystemVerilog

22h

DSP / NPU Design Verification Sr Staff Engineer

Qualcomm Bangalore, India

Verilog SystemVerilog

22h

RTL Design Engineer -Sr Lead

Qualcomm Bangalore, India

Verilog SystemVerilog

22h

RTL(IPA Design/WRD) - Sr Lead

Qualcomm Bangalore, India

VHDL Verilog

22h

Wireless RTL Design Engineer

Apple Multiple Locations

RTL Logic Design

22h

Staff Design Reliability Verification Engineer

Micron Boise, Idaho

Verification

22h

SENIOR ENGINEER - HBM VERIFICATION

Micron Jalisco, Chiapas

UVM DFT

22h

Staff Engineer, RTL Design

Micron Hyderabad, Telangana

Verilog RTL

22h

Principal Compute Pathfinding ASIC Design

Micron Multiple locations

Verilog SystemVerilog

22h

VLSI Engineer I - 0T1191

HPE Juniper Networks Sunnyvale, California

FPGA Logic Design

22h

Design Verification Manager

Semtech Multiple locations

VHDL Verilog

22h

Sr. Mixed Signal/RF Test Engineer

NXP Semiconductors Irvine, California

DFT Design for Test

22h

Principal RFIC-PLL Design Engineer

Blue Origin Kraków, Lesser Poland Voivodeship

SystemVerilog Digital Design

22h

Senior Analog Mixed-Signal Design Verification Engineer

Blue Origin Kraków, Lesser Poland Voivodeship

Verilog SystemVerilog

22h

Principal Analog Mixed-Signal IC Design Engineer

Blue Origin Kraków, Lesser Poland Voivodeship

SystemVerilog Digital Design

22h

Principal Analog Mixed-Signal Design Verification Engineer

Blue Origin Kraków, Lesser Poland Voivodeship

Verilog SystemVerilog

22h

Senior FPGA/Prototype Design Engineer 

Blue Origin Kraków, Lesser Poland Voivodeship

Verilog System Verilog

22h

Senior FPGA/Prototype Design Engineer 

Blue Origin Kraków, Lesser Poland Voivodeship

Verilog System Verilog

22h

Principal FPGA/Prototype Design engineer 

Blue Origin Kraków, Lesser Poland Voivodeship

Verilog System Verilog

22h

Principal FPGA/Prototype Design engineer 

Blue Origin Kraków, Lesser Poland Voivodeship

Verilog System Verilog

22h

Chassis IP Design Engineer

Intel Bangalore, India

Verilog System Verilog

22h

Chassis IP Senior Design Engineer

Intel Bangalore, India

Verilog System Verilog

22h

GPU Logic Design Engineer

Intel Bangalore, India

RTL Register Transfer

22h

GPU Senior Logic Design Engineer

Intel Bangalore, India

Verilog System Verilog

22h

E-core CPU Clock Design Engineer

Intel Penang, Malaysia

Synthesis SOC

22h

CPU Validation Engineer

Intel Austin, Texas

Verilog System Verilog

22h

SOC Emulation Validation Engineer

Intel Multiple locations

VHDL Verilog

22h

SoC Functional Validation Engineer - Memory Pre-silicon Validation

Intel Penang, Malaysia

FPGA SOC

22h

SoC Functional Validation Engineer – Central Execution Platform Enabling

Intel Penang, Malaysia

SOC

22h

SoC Functional Validation Engineer – Central Execution Platform Enabling

Intel Penang, Malaysia

SOC

22h

Infrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization

Broadcom Multiple locations

Verilog System Verilog

23h

Senior Engineer, Logic Equivalence CAD

Marvell Bangalore, India

RTL Synthesis

23h

Senior Staff Engineer - Emulation

Marvell Bangalore, India

FPGA RTL

23h

Principal Engineer, Emulation

Marvell Bangalore, India

FPGA RTL

23h

Senior Principal Engineer, Emulation

Marvell Bangalore, India

FPGA RTL

23h