today

Staff Engineer - CPU DV

SiFive Hyderabad, Telangana

Verilog System Verilog

17h

DFT - Staff OR Principal- Eng/Manager

Qualcomm Hyderabad, Telangana

ASIC RTL

17h

ASIC/FPGA Design Verification Engineer

Qualcomm Ottawa, Ontario

Verilog SystemVerilog

17h

ASICS Engineer

Qualcomm San Diego, California

ASIC RTL

17h

DSP Micro-Architect RTL Engineer

Qualcomm Austin, Texas

ASIC RTL

17h

Circuit Analysis and Modeling Engineer, Senior - Cork, Ireland

Qualcomm Cork, Munster

Verilog SystemVerilog

17h

CPU SRAM Design Engineer, Senior - Cork, Ireland

Qualcomm Cork, Munster

Verilog Static Timing

17h

SOC Design Implementation Engineer

Qualcomm Hyderabad, Telangana

FPGA RTL

17h

Serdes PHY Analog Design Engineer

Qualcomm Bangalore, India

FPGA RTL

17h

Product Development Test Engineering

Qualcomm Tijuana, Baja California

FPGA ASIC

17h

Graphics System-on-Chip

Qualcomm Tijuana, Baja California

SystemVerilog FPGA

17h

SoC Physical Design Engineer

Qualcomm Bangalore, India

FPGA ASIC

17h

NOC Design Verification Sr Lead Engineer

Qualcomm Bangalore, India

Verilog System Verilog

17h

NPU STA/Timing Engineer

Qualcomm Bangalore, India

FPGA ASIC

17h

NPU Physical Design Engineer (Lead/Staff/Sr Staff)

Qualcomm Bangalore, India

FPGA STA

17h

Principal Engineer - PnP

Qualcomm Bangalore, India

FPGA Logic Design

17h

Digital Design Engineer

Qualcomm San Diego, California

Verilog System Verilog

17h

Sr ASIC Design Verification Engineer, Low Power AI

Qualcomm Markham, Ontario

VHDL Verilog

17h

Principal Digital Verification Engineer

Analog Devices Multiple locations

SystemVerilog UVM

17h

Electrical Engineer or Principal Electrical Engineer

Northrop Grumman Plymouth, Minnesota

VHDL FPGA

17h

Principal Engineer Systems-14019-1

Northrop Grumman Roy, Utah

VHDL Verilog

17h

Sr Principal Engineer Systems-3217-3

Northrop Grumman Roy, Utah

VHDL Verilog

17h

Integrated Circuits Intern

Draper Cambridge, Massachusetts

Verilog System Verilog

17h

Printed Circuit Board (PCB) Layout Engineer

HPE Juniper Networks Spring, Texas

ASIC DFT

18h

Senior Principal Hardware Design Engineer

BAE Systems Austin, Texas

FPGA Digital Design

18h

Senior Design Verification Engineer - FPGA

BAE Systems Multiple locations

VHDL SystemVerilog

18h

CPU Clock Design Lead

Intel Bangalore, India

Synthesis SOC

18h

CPU Senior Floor Plan Engineer

Intel Bangalore, India

ASIC Logic Design

18h

CPU Senior Clock Design Engineer

Intel Bangalore, India

Synthesis SOC

18h

CPU Senior Floor Plan Engineer

Intel Bangalore, India

ASIC Logic Design

18h

Senior CAD Engineer – Physical Design Signoff

Intel Bangalore, India

STA Static Timing

18h

Senior Technical Lead - CPU Physical Design

Intel Bangalore, India

ASIC RTL

18h

Sr SOC Emulation Validation Engineer

Intel Multiple locations

RTL Register Transfer

18h

Sr SOC Emulation Validation Engineer

Intel Multiple locations

RTL Register Transfer

18h

Senior EDA Design Automation Engineer - Digital Implementation

Intel Penang, Malaysia

RTL Digital Design

18h

Microarchitecture and Design Engineer - AI SoC

Intel Multiple locations

VHDL Verilog

18h

CPU RTL Design Engineer

Intel Multiple locations

Verilog SystemVerilog

18h

ASIC Design Verification Engineer

Broadcom Multiple locations

Verilog System Verilog

18h

NASA Space Reactor – 1 Freedom Flight Software Verification and Validation (V&V) Test Engineer

CACI Houston, Texas

Verification

18h

Principal Engineer-Verification

Microchip Technology Bangalore, India

VHDL Verilog

18h

Principal Verification Engineer

Microchip Technology Bangalore, India

VHDL Verilog

18h

Senior Engineer I - Validation

Microchip Technology Multiple locations

FPGA Digital Design

18h

Senior Principal FPGA Design Engineer

BAE Systems Fort Wayne, Indiana

VHDL Verilog

18h

Dir, Firmware Engineering

Lattice Semiconductor Pune, Maharashtra

FPGA ASIC

18h

Wireless PHY Systems Engineer — Pre-Silicon Emulation

Apple San Francisco, California

RTL Digital Design

18h

SOC Design Verification Engineer

Apple Multiple Locations

Verilog SystemVerilog

18h

Wireless SoC RF Integration and Validation Engineer

Apple Multiple Locations

RTL SOC

18h

SOC Design Verification Engineer

Apple Multiple Locations

Verilog SystemVerilog

18h

Senior Verification Engineer, PCIE

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

18h

Software Verification Engineer

NVIDIA Raanana, Israel

Verification

18h