36 open FPGA & RTL jobs at Silicon Labs

36 open logic design roles at Silicon Labs.

ASIC jobs DFT jobs RTL jobs SOC jobs STA jobs SystemVerilog jobs UVM jobs Verification jobs Verilog jobs Central Singapore Telangana Texas

Director, Digital IP Roadmap

Silicon Labs Austin, Texas

RTL SOC

6h

Lead Engineer – CAD Digital Verification

Silicon Labs Hyderabad, Telangana

Verilog SystemVerilog

6h

Lead Engineer - CAD Physical Verification

Silicon Labs Hyderabad, Telangana

SOC Verification

2d

Static Timing Analysis Engineer

Silicon Labs Austin, Texas

Verilog System Verilog

7d

Lead Engineer – IC Verification

Silicon Labs Hyderabad, Telangana

SystemVerilog RTL

7d

Lead Engineer – RTL Design (Wireless Modem IP)

Silicon Labs Hyderabad, Telangana

Verilog SystemVerilog

7d

Chip Lead

Silicon Labs Austin, Texas

Verilog System Verilog

20d

Senior Design Verification Engineer

Silicon Labs Austin, Texas

SystemVerilog UVM

27d

Senior Design Engineer

Silicon Labs Singapore, Central Singapore

RTL SOC

29d

Digital Engineer

Silicon Labs Singapore, Central Singapore

Digital Design SOC

1mo

Design Verification Engineer II

Silicon Labs Singapore, Central Singapore

SystemVerilog RTL

1mo

Associate Staff Design Modeling Engineer

Silicon Labs Austin, Texas

RTL UVM

1mo

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