40 open FPGA & RTL jobs at Tenstorrent

40 open logic design roles at Tenstorrent.

ASIC jobs DFT jobs RTL jobs SOC jobs STA jobs SystemVerilog jobs UVM jobs Verification jobs Verilog jobs Bavaria California Central Banat District Colorado Karnataka Massachusetts Ontario Texas

Physical Design CPU Methodology Engineer

Tenstorrent Santa Clara, California

ASIC RTL

Sr. Staff Engineer, SoC Design Verification

Tenstorrent Multiple locations

UVM SOC

CPU Core Design Verification Manager

Tenstorrent Bengaluru, Karnataka

RTL UVM

Sr. Staff Engineer, Front-End Verification

Tenstorrent Multiple locations

SystemVerilog RTL

10d

System IP RTL Design Lead

Tenstorrent Bengaluru, Karnataka

Verilog SystemVerilog

13d

Staff Engineer, Diagnostic Development

Tenstorrent Toronto, Ontario

ASIC SOC

19d

Sr. Engineer, SoC Design Verification Engineer, System Management Controller

Tenstorrent Multiple locations

SystemVerilog UVM

19d

Physical Design Engineer, AI Accelerator IP

Tenstorrent Multiple locations

RTL STA

1mo

Staff Design Verification Engineer, AI HW

Tenstorrent Multiple locations

SystemVerilog RTL

1mo

Design Verification Engineer, Automotive Robotics

Tenstorrent Munich, Bavaria

SystemVerilog UVM

1mo

Verification Engineer

Tenstorrent Japan

Verilog System Verilog

1mo

Top Level Physical Design Engineer

Tenstorrent Multiple locations

RTL SOC

1mo

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