Aug. 25, 2026

Digital Design Engineer Intern

Analog Devices Multiple locations

VHDL Verilog

21d

ASIC Physical Design Engineer (RDSS Intern)

NVIDIA Hsinchu, Hsinchu

ASIC RTL

21d

ASIC Physical Design Intern - 2027

NVIDIA Hsinchu, Hsinchu

ASIC RTL

21d

Aug. 21, 2026

Electrical Engineering Intern (Summer 2027)

Second Order Effects Multiple Locations

VHDL Verilog

24d

Electrical Engineering Intern (Spring 2027)

Second Order Effects Multiple Locations

VHDL Verilog

24d

Aug. 20, 2026

System Software Engineer – GPU and SOC (2027 RDSS Intern)

NVIDIA Taipei, Taipei

SOC

25d

NVIDIA 2027 Internships: Mixed Signal Design

NVIDIA Santa Clara, California

VHDL Verilog

25d

NVIDIA 2027 Internships: Hardware Verification

NVIDIA Santa Clara, California

VHDL Verilog

25d

NVIDIA 2027 Internships: Hardware Physical Design / VLSI

NVIDIA Santa Clara, California

Logic Design Digital Design

25d

NVIDIA 2027 Internships: Hardware Engineering

NVIDIA Santa Clara, California

VHDL Verilog

25d

NVIDIA 2027 Internships: Hardware Design for Test (DFT)

NVIDIA Santa Clara, California

Digital Design STA

25d

NVIDIA 2027 Internships: Hardware ASIC Design

NVIDIA Santa Clara, California

VHDL Verilog

25d

NVIDIA 2027 Internships: Digital Circuit Design

NVIDIA Santa Clara, California

VHDL Verilog

25d

NVIDIA 2027 Internships: Computer Architecture

NVIDIA Santa Clara, California

VHDL Verilog

25d

Hardware Engineering Intern

BAE Systems Manassas, Virginia

VHDL Verilog

25d

Aug. 18, 2026

FPGA Internship (2027 Start)

Optiver Amsterdam, North Holland

VHDL Verilog

28d

Aug. 17, 2026

Design/DSP/Verification Intern - PhD Degree

Marvell Santa Clara, California

SOC

28d

Physical Design Intern

Marvell Córdoba, Córdoba

ASIC Static Timing

28d

Forward Error Correction Intern

Marvell Córdoba, Córdoba

Verilog SystemVerilog

28d

Digital IC Design Intern

Marvell Córdoba, Córdoba

VHDL Verilog

28d

Aug. 13, 2026

2027 Internship - FPGA Engineer

Virtu Financial Dublin, Leinster

Verilog SystemVerilog

1mo

2027 Shanghai FPGA Developer Summer Internship

Optiver Shanghai, Shanghai

VHDL Verilog

1mo

Aug. 11, 2026

FPGA Engineer Intern (Summer 2027 - Chicago)

Optiver Chicago, Illinois

VHDL Verilog

1mo

FPGA Engineer Intern (Summer 2027 - Austin)

Optiver Austin, Texas

VHDL Verilog

1mo

2027 Intern - Analog Design Engineer

NXP Semiconductors Suzhou

SOC IP Design

1mo

2027 Intern - Analog Design Engineer

NXP Semiconductors Suzhou

SOC IP Design

1mo

Digital Physical Design (P&R) Intern

NXP Semiconductors Chandler (Office)

RTL Digital Design

1mo

Internship - Hardware Robustness for SMI Register Interfaces in Automotive PHY Chips

NXP Semiconductors Eindhoven, North Brabant

VHDL Verilog

1mo

Internship: Software Developer NFC/UWB System Verification (m/f/d)

NXP Semiconductors Gratkorn

Verification

1mo

Internship – Digital Verification & Generative AI Support (m/f/d)

NXP Semiconductors Gratkorn

SystemVerilog Digital Design

1mo

Internship – Digital Design & Generative AI Support (m/f/d)

NXP Semiconductors Gratkorn

Verilog Digital Design

1mo

Internship: Digital Design Team Support (m/f/d)

NXP Semiconductors Gratkorn

FPGA Digital Design

1mo

Aug. 8, 2026

Engineering Intern (EE/CE/RF) III, Summer 2027 (Hybrid)

BAE Systems Nashua, New Hampshire

VHDL Verilog

1mo

Aug. 4, 2026

Summer 2027 Silicon Engineering Internship/Co-op

SpaceX Flexible - Any SpaceX Site

VHDL Verilog

1mo

Spring 2027 Silicon Engineering Internship/Co-op

SpaceX Flexible - Any SpaceX Site

VHDL Verilog

1mo

Aug. 2, 2026

Intern - Design Verification Infrastructure Engineer - Platform

SiFive Multiple locations

Chisel Verification

1mo

Aug. 1, 2026

Hardware Undergrad Engineering Internships

Apple United States, United States

FPGA ASIC

1mo

Hardware Masters Engineering Internships

Apple United States, United States

FPGA ASIC

1mo

Hardware PhD Internships

Apple United States, United States

FPGA ASIC

1mo

2027 Internship- Hardware Engineer (FPGA)

Virtu Financial Austin, Texas

Verilog SystemVerilog

1mo

July 28, 2026

Intern - Design Verification Infrastructure Engineer - Platform

SiFive Multiple locations

Chisel Verification

1mo

July 22, 2026

Campus FPGA Engineer (Intern)

Jump Trading London, England

VHDL Verilog

1mo

Campus ASIC Engineer (Intern)

Jump Trading Bristol

VHDL Verilog

1mo

Digital IC Design Engineer Intern

Neuralink South San Francisco, California, United States

SystemVerilog FPGA

1mo

Analog and Mixed-Signal IC Design Engineer Intern

Neuralink South San Francisco, California, United States

Verilog SystemVerilog

1mo