UVM Jobs

Senior Engineer, Design Verification Engineering

Analog Devices Shanghai, Shanghai

SystemVerilog UVM

7h

Senior FPGA Design Engineer

BAE Systems Nashua, New Hampshire

VHDL Verilog

7h

Senior IC Design Verification Engineer

NXP Semiconductors Kanata

Verilog System Verilog

7h

Front End Design Verification Engineer

Tenstorrent Santa Clara, California

SystemVerilog ASIC

8h

Digital Verification Engineer - MCU

NXP Semiconductors Catania, Sicily

SystemVerilog UVM

1d

Manager, Project Management - Chip Design

NVIDIA Tel Aviv, Tel Aviv District

Verilog SystemVerilog

1d

SMMU Senior Lead Design Verification Engineer

Qualcomm Bangalore, India

Verilog System Verilog

1d

Design Verification Engineer, Senior Staff

Qualcomm Toronto, Ontario

SystemVerilog ASIC

1d

SoC Design Verification Engineer (Up to Principal Level)

Qualcomm Ho Chi Minh City, Hồ Chí Minh

SystemVerilog FPGA

1d

Camera VI Engineer

Qualcomm Tijuana, Baja California

Verilog SystemVerilog

1d

Digital Design Verification Engineer

Broadcom Multiple locations

UVM SOC

1d

Senior FPGA Engineer

Astranis San Francisco, California

Verilog SystemVerilog

1d

GSoC Design Verification Engineer

Qualcomm San Diego, California

Verilog System Verilog

2d

ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm Santa Clara, California

Verilog SystemVerilog

2d

Staff Design Verification Engineer – High Performance CPU Core

SiFive Multiple locations

SystemVerilog ASIC

2d

Senior Design Verification Engineer – High Performance CPU Core

SiFive Multiple locations

SystemVerilog RTL

2d

GPU Validation and Emulation Engineer, Senior

Qualcomm San Diego, California

Verilog System Verilog

4d

FY27 Intern - Compute DSP/AI Processor Engineering Internship - Canada (16 months)

Qualcomm Markham, Ontario

VHDL Verilog

4d

Staff / Senior Staff Microarchitect / System Engineer

Qualcomm Noida, Uttar Pradesh

Verilog UVM

4d

Staff design Verification Engineer

Qualcomm Noida, Uttar Pradesh

Verilog System Verilog

4d