UVM Jobs

Browse open UVM positions for FPGA, ASIC, and RTL engineers.

All Locations California 140 Bangalore 74 Texas 60 Austin, TX 58 Santa Clara, CA 49 Telangana 38 Hyderabad 38 Karnataka 33

ASIC Design Engineer - Digital DSP Design & Analog/Mixed-Signal

Celero Communications, Inc. Ottawa, Ontario

Verilog SystemVerilog

27d

ASIC Design Engineer - Digital DSP Design & Analog/Mixed-Signal

Celero Communications, Inc. Irvine, California

Verilog SystemVerilog

27d

Senior Engineer I - Verification

Microchip Technology Chennai, Tamil Nadu

Verilog System Verilog

27d

Senior Principal Digital Engineer

Northrop Grumman Woodland Hills, California

VHDL Verilog

27d

NVIDIA 2027 New College Graduate: Hardware ASIC Engineering - China

NVIDIA Shanghai, Shanghai

ASIC RTL

27d

Principal/ Sr. Principal FPGA Design Engineer

Northrop Grumman Rolling Meadows, Illinois

VHDL Verilog

28d

Principal Engineer Electrical

Northrop Grumman Gilbert, Arizona

Verilog System Verilog

28d

ASIC Engineer - Early Career

Blue Origin Greater Seattle Area; Central Texas; Bay Area, CA

Verilog SystemVerilog

28d

SLD FPGA Verification Engineer III - Lunar Permanence

Blue Origin Space Coast, Florida

Verilog System Verilog

28d

Principal ASIC Design Verification Engineer - Terawave

Blue Origin Los Angeles, California

Verilog System Verilog

28d

Principal Modem PHY IP Design Verification Engineer - Terawave

Blue Origin San Diego, California

SystemVerilog FPGA

28d

Senior ASIC Design Verification Engineer - Terawave

Blue Origin Los Angeles, California

Verilog System Verilog

28d

Senior FPGA Design & Verification Engineer – TeraWave

Blue Origin Reston, Virginia

VHDL Verilog

28d

Silicon Validation Engineer

MatX Multiple locations

Remote SystemVerilog RTL

29d

Design Verification Engineer

MatX Multiple locations

Remote SystemVerilog UVM

29d

Emulation Engineer

MatX Multiple locations

Remote Verilog SystemVerilog

29d

SoC Design Verification Engineer

MatX Multiple locations

Remote SystemVerilog UVM

29d

Senior ASIC Verification Engineer - HSIO

NVIDIA Multiple locations

SystemVerilog ASIC

29d

CPU Design Methodology Engineer

NVIDIA Multiple locations

Verilog System Verilog

29d

NVIDIA 2027 Internships: Hardware Verification

NVIDIA Santa Clara, California

VHDL Verilog

29d

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