UVM Jobs in Texas

Staff Design Verification Engineer

Cirrus Logic Austin, Texas

VHDL Verilog

1mo

Senior Staff Digital Design Engineer

Cirrus Logic Austin, Texas

Verilog ASIC

1mo

Senior Staff Design Verification Engineer

Cirrus Logic Austin, Texas

VHDL Verilog

1mo

Senior Formal Verification Engineer (CH-64001149)

Cirrus Logic Austin, Texas

Verilog System Verilog

1mo

Senior Digital Design Engineer

Cirrus Logic Austin, Texas

Verilog ASIC

1mo

Senior Design Verification Engineer

Cirrus Logic Austin, Texas

VHDL Verilog

1mo

Digital Design Engineer

Cirrus Logic Austin, Texas

Verilog ASIC

1mo

Design Verification Engineer

Cirrus Logic Austin, Texas

VHDL Verilog

1mo

Analog Mixed Signal Modeling Engineer (UL - 02)

Cirrus Logic Austin, Texas

Verilog SystemVerilog

1mo

Senior Design Verification Engineer

Mythic AI Austin, Texas

Verilog SystemVerilog

1mo

Design Verification Engineer

Mythic AI Austin, Texas

Verilog SystemVerilog

1mo

Staff Design Verification Engineer – Coherent Interconnect

SiFive Multiple locations

SystemVerilog FPGA

1mo

Sr. Staff Engineer - Digital Design Verification

Ambiq Micro, Inc. Austin, Texas

Verilog SystemVerilog

1mo

Sr. ASIC Design Verification Engineer (Silicon Engineering)

SpaceX Austin, Texas

ASIC RTL

1mo

Principal Design Verification Engineer (Silicon Engineering)

SpaceX Austin, Texas

FPGA ASIC

1mo

Design Verification Engineer (Silicon Engineering)

SpaceX Austin, Texas

SystemVerilog ASIC

1mo

CPU Core Design Verification Testbench Lead

Tenstorrent Multiple locations

RTL UVM

1mo

Hardware Verification Engineer

Baya Systems Austin, Texas

Verilog SystemVerilog

1mo

Design Verification (DV) Engineer

Hudson River Trading Multiple locations

SystemVerilog FPGA

1mo