UVM Jobs
Browse open UVM positions for FPGA, ASIC, and RTL engineers.
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Senior UVM Digital Verification Engineer
Power-Domain Verification Lead
Senior ASIC Verification Engineer
ASIC Verification Engineer
ASIC Verification Engineer
Senior Staff Verification Engineer
Principal Senior Engineer - FPGA Design - $20K Sign On Bonus
Engineer Senior Principal - FPGA Design - $20K Sign On Bonus
Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
Engineer Principal - FPGA Design - $20K Sign On Bonus
Engineer Senior - FPGA Design - $10K Sign-On Bonus
Senior Principal FPGA Verification Engineer - $15K Sign-On Bonus
Engineer Senior - FPGA Verification
Engineer II - FPGA Verification
Senior FPGA Verification Engineer - $30K Sign On Bonus
Principal FPGA Digital Design Engineer - Sign-on Bonus
Lead Engineer - Design Verification (Low power UPF/CPF)
Senior SoC Design Verification Engineer
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