UVM Jobs

Mixed Signal Design Verification Engineer

Qualcomm San Diego, California

SystemVerilog ASIC

11d

Camera IP Verification - Sr Engineer

Qualcomm Bangalore, India

SystemVerilog FPGA

11d

Design for Test Intern, BS - Summer 2027

Marvell Multiple locations

UVM DFT

11d

Design Verification Intern, BS - Summer 2027

Marvell Multiple locations

VHDL ASIC

11d

Design Verification Intern, MS - Summer 2027

Marvell Multiple locations

VHDL ASIC

11d

ASIC Design and Verification Intern, SOC - 2027

NVIDIA Shanghai, Shanghai

Verilog SystemVerilog

11d

Sr Design Verification Eng

Lattice Semiconductor Pune, Maharashtra

Verilog System Verilog

11d

Sr. Staff Engineer, Front-End Verification

Tenstorrent Multiple locations

SystemVerilog RTL

11d

ASIC Verification Engineer - Clocks

NVIDIA Bengaluru, Karnataka

Verilog System Verilog

12d

Senior Compute Subsystem Verification Engineer

Qualcomm Markham, Ontario

Verilog System Verilog

12d

ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm Santa Clara, California

Verilog SystemVerilog

12d

ASIC Design Verification Engineer, up to Sr. Staff

Qualcomm Hsinchu City, Taiwan

Verilog System Verilog

12d

Staff Engineer CPU DV

SiFive Hyderabad, Telangana

Verilog System Verilog

12d

Staff Design Verification

SiFive Hyderabad, Telangana

SystemVerilog ASIC

12d

Senior Design Verification Engineer

SiFive Hyderabad, Telangana

Verilog SystemVerilog

12d

Senior Design Verification Engineer - FPGA

BAE Systems Multiple locations

VHDL SystemVerilog

12d

TOP Design Verification Engineer Intern

SK hynix memory solutions America Inc. San Jose, California

Verilog System Verilog

12d

Senior FPGA Verification Engineer

IonQ Oxford, England

SystemVerilog FPGA

12d

Sr. Staff Engineer - Design Verification

SiFive Hyderabad, Telangana

Verilog SystemVerilog

13d

Senior CPU Design Verification Engineer

SiFive Hyderabad, Telangana

Verilog SystemVerilog

13d