FPGAjobs - Jobs for FPGA, ASIC and RTL engineers

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Featured FPGA Engineer - Come Build Really Cool Shit with Us

MicroNova Waterford, Michigan

VHDL Verilog

12d

RFIC Layout Engineer

Apple Multiple Locations

RTL SOC

GPU IP Verification Engineer

Intel Bangalore, India

VHDL Verilog

GPU IP Integration Model Build Engineer

Intel Bangalore, India

UVM OVM

Senior PDK Support Engineer (Physical Verification)

Intel Multiple locations

SOC Verification

CPU Circuit Design Engineer

Intel Bangalore, India

Verilog Digital Design

Senior Engineer II - Validation (ASIC)

Microchip Technology Basking Ridge, New Jersey

ASIC

Senior Principal FPGA Verification Engineer - $30K Sign-On Bonus

BAE Systems Westminster, Colorado

VHDL Verilog

Ph.D. Intern - Architecture, DSP & Systems Architecture

Marvell Multiple locations

Verilog SystemVerilog

Cyber Security Operations Analyst (Tier 2 SOC)

Marvell Bangalore, India

SOC

Summer Program Intern

Marvell Córdoba, Córdoba

Verilog Digital Design

Electrical Engineer

CACI Florham Park, NJ, US

VHDL Verilog

Electrical Engineer

CACI Florham Park, NJ, US

VHDL Verilog

Embedded Systems Engineer

CACI San Antonio, Texas

VHDL Verilog

Physical Design Engineer (Silicon Engineering)

SpaceX Palo Alto, California

ASIC RTL

Physical Design Engineer (Silicon Engineering)

SpaceX Irvine, California

ASIC RTL

Physical Design Engineer (Silicon Engineering)

SpaceX Austin, Texas

ASIC RTL

Senior FPGA Verification Engineer

Anduril Boulder, Colorado

VHDL Verilog

Senior FPGA Verification Engineer

Anduril Goleta, California

VHDL Verilog

Senior FPGA Verification Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

Senior Firmware Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

Senior Embedded Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

Design Verification Engineer - Compute

MatX Mountain View, California

Remote SystemVerilog UVM

Sept. 11, 2026

Principal FPGA Designer – TeraWave

Blue Origin Greater Seattle Area

VHDL Verilog

Senior Engineer, Digital Design Engineering

Analog Devices Egypt, New Cairo

SystemVerilog FPGA

GPU IP Lead Emulation Model Build Engineer

Intel Bangalore, India

FPGA RTL

Design Verification Engineer

Intel Santa Clara, California

SystemVerilog FPGA

Junior CPU Verification Engineer

Intel Multiple locations

Verilog System Verilog

Digital Signal Processing Engineer

Semtech Meylan, Auvergne-Rhône-Alpes

SystemVerilog RTL

Engineering Intern (EE/CE/RF) III, Summer 2027 (Hybrid)

BAE Systems Nashua, New Hampshire

VHDL Verilog

FPGA Engineer

Philips Suzhou

VHDL Verilog

Senior Power Architect, SoC Power and Thermal Management SW

NVIDIA Santa Clara, California

SOC

Senior System Integration and Validation Engineer

NVIDIA Santa Clara, California

Logic Design DFT

ASIC Design Engineer – Clocks IP

NVIDIA Multiple locations

Verilog ASIC

Formal Verification Engineer

NVIDIA Bengaluru, Karnataka

Verilog System Verilog

Senior System Level Testability Engineer

NVIDIA Santa Clara, California

Digital Design SOC

ASIC Design Engineer - New College Grad 2026

NVIDIA Santa Clara, California

VHDL Verilog

Senior Verification Engineer, PCIE

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

Principal Engineer - Layout

Microchip Technology Allentown, Pennsylvania

Place and Route Synthesis

Senior Technical Staff Engineer - SOC Verification

Microchip Technology Chandler, Arizona

SystemVerilog RTL

Technical Safety Assessor / Architect (HW- Soc) (f/m/d)

NXP Semiconductors Toulouse, Occitanie

SOC Verification

Senior Digital Design Engineer

NXP Semiconductors Austin, Texas

Verilog System Verilog

Principal Physical Design Engineer

NXP Semiconductors Multiple locations

ASIC RTL

Technical Director, Digital Design Methodology & Flow Architecture

NXP Semiconductors Multiple locations

RTL Digital Design

NPU/AI Processor Synthesis Lead

Qualcomm Bangalore, India

RTL STA

IP Verification Lead Engineer, Sr

Qualcomm Bangalore, India

Verilog System Verilog

Senior Director, Program Management - Data Center Custom Silicon

Qualcomm Multiple locations

ASIC SOC

CPU Firmware Verification and Validation

Qualcomm Bangalore, India

DFT Design for Test

VLSI Design Engineer for Server / Data Center Products

Qualcomm San Diego, California

FPGA ASIC

MBIST Diagnostics Engineer, up to Sr. Staff

Qualcomm Hsinchu City, Taiwan

ASIC SOC

SOC Limits Management Architect

Qualcomm San Diego, California

ASIC SOC

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