July 22, 2026

CPU Digital Design Engineer

Baidu USA Sunnyvale, California

FPGA RTL

2mo

CPU Design Architect / Principal Digital Design Engineer

Baidu USA Sunnyvale, California

FPGA RTL

2mo

Senior Flight Software Engineer

K2 Space Los Angeles, California

VHDL SystemVerilog

2mo

Senior Flight Software Engineer

K2 Space Seattle, Washington

VHDL SystemVerilog

2mo

Senior FPGA Engineer

K2 Space Los Angeles, California

VHDL SystemVerilog

2mo

Senior FPGA Engineer

K2 Space Seattle, Washington

VHDL SystemVerilog

2mo

Senior ASIC Physical Design Engineer

K2 Space United States - Remote

ASIC RTL

2mo

Senior ASIC Physical Design Engineer

K2 Space Seattle, Washington

ASIC RTL

2mo

Senior ASIC Design Verification Engineer

K2 Space United States - Remote

SystemVerilog ASIC

2mo

Senior ASIC Design Verification Engineer

K2 Space Seattle, Washington

SystemVerilog ASIC

2mo

Principal Flight Software Engineer

K2 Space Seattle, Washington

VHDL SystemVerilog

2mo

Principal Flight Software Engineer

K2 Space Los Angeles, California

VHDL SystemVerilog

2mo

Principal ASIC Physical Design Engineer

K2 Space United States - Remote

ASIC RTL

2mo

Principal ASIC Physical Design Engineer

K2 Space Seattle, Washington

ASIC RTL

2mo

Principal ASIC Design Verification Engineer

K2 Space Seattle, Washington

SystemVerilog ASIC

2mo

Principal ASIC Design Verification Engineer

K2 Space United States - Remote

SystemVerilog ASIC

2mo

OS Platform Engineer

K2 Space Los Angeles, California

VHDL SystemVerilog

2mo