UVM Jobs in California

Senior Methodologist for AIML Enhanced Design/Verification

HPE Juniper Networks Sunnyvale, California

SystemVerilog FPGA

8h

Sr. Design Verification Engineer - Digital

Semtech San Diego, California

Verilog SystemVerilog

8h

SOC Design Verification Engineer – Data Center Solutions

Qualcomm San Diego, California

Verilog System Verilog

9h

Custom SOC IP Verification Engineer

NVIDIA Multiple locations

SystemVerilog ASIC

9h

Midcore Design Verification Engineer

Tenstorrent Santa Clara, California

SystemVerilog ASIC

10h

Front End Design Verification Engineer

Tenstorrent Santa Clara, California

SystemVerilog ASIC

1d

Digital Design Verification Engineer

Broadcom Multiple locations

UVM SOC

2d

Senior FPGA Engineer

Astranis San Francisco, California

Verilog SystemVerilog

2d

GSoC Design Verification Engineer

Qualcomm San Diego, California

Verilog System Verilog

3d

ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm Santa Clara, California

Verilog SystemVerilog

3d

Staff Design Verification Engineer – High Performance CPU Core

SiFive Multiple locations

SystemVerilog ASIC

3d

Senior Design Verification Engineer – High Performance CPU Core

SiFive Multiple locations

SystemVerilog RTL

3d

GPU Validation and Emulation Engineer, Senior

Qualcomm San Diego, California

Verilog System Verilog

5d

Senior FPGA Verification Engineer

Anduril Goleta, California

VHDL Verilog

5d

Design Verification Engineer - Compute

MatX Mountain View, California

Remote SystemVerilog UVM

5d

Design Verification Engineer

Intel Santa Clara, California

SystemVerilog FPGA

6d

Staff Systems Design Engineer

Analog Devices Multiple locations

SystemVerilog RTL

7d

Sr. Staff Engineer, SoC Design Verification

Tenstorrent Multiple locations

UVM SOC

7d

Senior Firmware Verification and Bringup Engineer

NVIDIA Santa Clara, California

SystemVerilog RTL

8d

Mixed Signal Design Verification Engineer

Qualcomm San Diego, California

SystemVerilog ASIC

12d