UVM Jobs in California

Senior Firmware Verification and Bringup Engineer

NVIDIA Santa Clara, California

SystemVerilog RTL

9d

Mixed Signal Design Verification Engineer

Qualcomm San Diego, California

SystemVerilog ASIC

13d

Design for Test Intern, BS - Summer 2027

Marvell Multiple locations

UVM DFT

13d

Design Verification Intern, BS - Summer 2027

Marvell Multiple locations

VHDL ASIC

13d

Design Verification Intern, MS - Summer 2027

Marvell Multiple locations

VHDL ASIC

13d

Sr. Staff Engineer, Front-End Verification

Tenstorrent Multiple locations

SystemVerilog RTL

13d

ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm Santa Clara, California

Verilog SystemVerilog

14d

Senior Design Verification Engineer - FPGA

BAE Systems Multiple locations

VHDL SystemVerilog

14d

TOP Design Verification Engineer Intern

SK hynix memory solutions America Inc. San Jose, California

Verilog System Verilog

14d

ASICS Design Verification Engineer

Qualcomm San Diego, California

VHDL Verilog

15d

Camera DV Engineer

Qualcomm San Diego, California

Verilog System Verilog

15d

Senior FPGA Verification Engineer, Air Dominance and Strike

Anduril Costa Mesa, California

SystemVerilog FPGA

15d

ASICS Design Verification Engineer-Senior

Qualcomm San Diego, California

VHDL Verilog

16d

Senior Design Verification Engineer - Neuromorphic Computing

Intel Multiple locations

ASIC RTL

16d

Senior Verification Engineer, SoC

NVIDIA Multiple locations

Verilog System Verilog

17d

GPU Design Verification Engineer

Qualcomm Multiple locations

VHDL Verilog

17d

SOC Verification and Methodology Engineer

Qualcomm San Diego, California

Verilog SystemVerilog

18d

FPGA Verification Engineer II

CesiumAstro El Segundo, California

VHDL Verilog

18d

SOC Design Verification Engineer

Qualcomm San Diego, California

Verilog System Verilog

19d

ASIC Verification Engineer

Broadcom Irvine, California

VHDL Verilog

20d