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Remote Synthesis HDL

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July 22, 2026

Senior FPGA Engineer

K2 Space Seattle, Washington

VHDL SystemVerilog

2mo

Senior ASIC Physical Design Engineer

K2 Space United States - Remote

ASIC RTL

2mo

Senior ASIC Physical Design Engineer

K2 Space Seattle, Washington

ASIC RTL

2mo

Senior ASIC Design Verification Engineer

K2 Space United States - Remote

SystemVerilog ASIC

2mo

Senior ASIC Design Verification Engineer

K2 Space Seattle, Washington

SystemVerilog ASIC

2mo

Principal Flight Software Engineer

K2 Space Seattle, Washington

VHDL SystemVerilog

2mo

Principal Flight Software Engineer

K2 Space Los Angeles, California

VHDL SystemVerilog

2mo

Principal ASIC Physical Design Engineer

K2 Space United States - Remote

ASIC RTL

2mo

Principal ASIC Physical Design Engineer

K2 Space Seattle, Washington

ASIC RTL

2mo

Principal ASIC Design Verification Engineer

K2 Space Seattle, Washington

SystemVerilog ASIC

2mo

Principal ASIC Design Verification Engineer

K2 Space United States - Remote

SystemVerilog ASIC

2mo

OS Platform Engineer

K2 Space Los Angeles, California

VHDL SystemVerilog

2mo

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