Aug. 31, 2026

Design Verification Staff

Qualcomm Chennai, Tamil Nadu

Verilog System Verilog

15d

Physical Design Engineer - DSP Team

Qualcomm Austin, Texas

ASIC Synthesis

15d

FPGA Firmware Engineer / FPGA Design Engineer

Qualcomm San Diego, California

Verilog System Verilog

15d

Sr. Staff/Principal Engineer - Low Power Chip Architect / System Engineer

Qualcomm San Diego, California

Verilog ASIC

15d

NPU AI/Processor Architectue(RTL) Design -Sr Lead

Qualcomm Bangalore, India

FPGA Verification

15d

DC Char ATE Test Engineer, up to Sr.

Qualcomm Hsinchu City, Taiwan

DFT SOC

15d

Embedded NPU Software Engineer

Qualcomm San Diego, California

Logic Design Digital Design

15d

SoC Platform Software Engineer

Qualcomm Hsinchu City, Taiwan

SOC

15d

Functional Verification Engineer, Staff -available Athens or Patra

Qualcomm Maroúsi, Attica Region

VHDL Verilog

15d

Senior Design Verification Engineer- Haifa, Hod Hasharon, Ramat Gan

Qualcomm Multiple locations

SystemVerilog ASIC

15d

SoC DFT Lead, Director

Qualcomm Ho Chi Minh City, Hồ Chí Minh

Verilog System Verilog

15d

Staff. Physical Design Engineer

Qualcomm San Diego, California

ASIC RTL

15d

Senior Product Test Engineer – Digital / ATE (SoC)

Qualcomm Singapore, Central Singapore

DFT Design for Test

15d

Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer

Qualcomm San Diego, California

Verilog SystemVerilog

15d

IC Digital Test Engineer

NVIDIA Yokneam, Israel

RTL STA

15d

Senior Physical Design Engineer

NVIDIA Tel Aviv, Tel Aviv District

STA Place and Route

15d

Senior Physical Design Backend Engineer

NVIDIA Tel Aviv, Tel Aviv District

STA Place and Route

15d

Staff FPGA Verification Engineer

CesiumAstro Austin, Texas

FPGA UVM

15d

Manager, Hardware Engineering

CesiumAstro Westminster, Colorado

FPGA Digital Design

15d

Manager, Hardware Engineering

CesiumAstro Austin, Texas

FPGA Digital Design

15d

FPGA Verification Engineer II

CesiumAstro El Segundo, California

VHDL Verilog

15d

Engineering Manager, RF Hardware

CesiumAstro Austin, Texas

Synthesis DFT

15d

Engineering Manager, RF Hardware

CesiumAstro Westminster, Colorado

Synthesis DFT

15d

Aug. 30, 2026

NASA Space Reactor – 1 Freedom Flight Software Verification and Validation (V&V) Test Engineer

CACI Houston, Texas

Verification

16d

RF Hardware Engineer

CACI Aberdeen Proving Ground, MD, US

VHDL Verilog

16d

Mid to Senior Systems/Hardware Engineer (VHDL)

CACI Fort Meade, MD, US

VHDL Verilog

16d

STA/Timing Methodology Engineer (Lead/Staff)

Qualcomm Bangalore, India

FPGA ASIC

16d

RTL Design -Staff/Sr Staff

Qualcomm Bangalore, India

FPGA Logic Design

16d

NPU/AI Processor Architecture (RTL)/Arithmetic Design Engineer - Sr Staff

Qualcomm Bangalore, India

16d

Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development

Qualcomm Santa Clara, California

Verilog SystemVerilog

16d

CPU RTL Design Engineer

Qualcomm Hsinchu City, Taiwan

ASIC RTL

16d

Firmware Development Engineer, Sr. Staff

Qualcomm Multiple locations

FPGA SOC

16d

Design Implementation Synthesis Engineer, Staff / Sr Staff

Qualcomm Bangalore, India

STA Synthesis

16d

Design Verification Architect (Sr staff or above)

Qualcomm Bangalore, India

SystemVerilog FPGA

16d

GPU Design Verification Engineer - Qualcomm, Cambridge, United Kingdom

Qualcomm Cambridge, England

VHDL Verilog

16d

SoC RTL Design- Sr Staff Engineer

Qualcomm Bangalore, India

Verilog System Verilog

16d

CPU Post-Silicon Validation Engineer - Multiple Levels

Qualcomm Multiple locations

FPGA SOC

16d

STA Design Engineer - Static Timing Analysis - Cork, Ireland

Qualcomm Cork, Munster

ASIC RTL

16d

CPU Physical Design Engineer - Cork, Ireland

Qualcomm Cork, Munster

ASIC Logic Design

16d

Wireless R&D IP Verification Engineer, Senior Staff

Qualcomm Bangalore, India

SystemVerilog FPGA

16d

Staff CAD Engineer (Silicon) - Cork, Ireland

Qualcomm Cork, Munster

Verilog System Verilog

16d

3D Memory Chip Architect and Design, Principal Engineer

Qualcomm San Diego, California

Verilog ASIC

16d

CPU Design Verification Engineer - Cork, Ireland

Qualcomm Cork, Munster

ASIC SOC

16d

CAD Verification Director

Qualcomm Noida, Uttar Pradesh

SystemVerilog FPGA

16d

Formal Verification Engineer

Qualcomm Bangalore, India

VHDL Verilog

16d

Sr. Staff CPU Physical Design CAD Engineer

Qualcomm Multiple locations

Logic Design Digital Design

16d

Senior Timing Engineer - Cork, Ireland

Qualcomm Cork, Munster

ASIC RTL

16d

Analog/Mixed Signal ASIC Design Engineer

Qualcomm San Diego, California

VHDL Verilog

16d

Staff Memory Controller Architecture and Design Engineer

Qualcomm San Diego, California

ASIC RTL

16d

SoC Program Manager

Qualcomm Chennai, Tamil Nadu

ASIC Synthesis

16d