Featured FPGA Engineer - Come Build Really Cool Shit with Us MicroNova Waterford, Michigan VHDL Verilog 12d
Architect – AI-Powered Performance Verification Automation NVIDIA Bengaluru, Karnataka SystemVerilog UVM 14d
ASIC Floorplan Design Engineer - New College Grad 2026 NVIDIA Santa Clara, California Verilog System Verilog 14d
Manager for IO and Mixed Signal Design Broadcom Singapore, Central Singapore Static Timing Place and Route 14d
Senior Design Verification Engineer - TeraWave Blue Origin Central Texas; Greater Seattle Area; Bay Area, CA SystemVerilog ASIC 14d
Principal Emulation & Prototyping Engineer Blue Origin San Diego, California Verilog SystemVerilog 14d
Senior Director SoC Architecture - AI Accelerators (Multiple Locations) Qualcomm Multiple locations ASIC Verification 14d
Next-Gen, High-Speed HBM, LPDDR Memory Subsystem ASIC Digital Design Engineer Qualcomm San Diego, California ASIC RTL 14d
NPU/AI Processor Architecture (RTL) design- Staff/Sr Staff Qualcomm Bangalore, India RTL Logic Design 14d
Peripherals Design Verification -Sr Staff Engineer Qualcomm Bangalore, India Verilog System Verilog 14d
Senior ASIC Design Verification Engineer, Compute DSP/AI Processors (multiple levels) Qualcomm Markham, Ontario SystemVerilog ASIC 14d
Product Development & Test Engineer, Mixed Signal IC Qualcomm Hsinchu City, Taiwan DFT Design for Test 14d
Low Power Analog-Mixed Signal Technologist, Senior Director Qualcomm San Diego, California ASIC SOC 14d
Physical Design , Principal Engineer/Director, (Custom Silicon Group) Qualcomm Bangalore, India ASIC RTL 14d