Aug. 29, 2026

RTL Performance Analysis Architect

Qualcomm Bangalore, India

SystemVerilog RTL

17d

CPU STA CAD Engineer

Qualcomm Multiple locations

STA Static Timing

17d

Design Verification Engineer — Memory Subsystem

Qualcomm Santa Clara, California

Verilog SystemVerilog

17d

SOC Verification and Methodology Engineer - SCL

Qualcomm San Diego, California

ASIC RTL

17d

Digital ASIC Design Engineer

Qualcomm San Diego, California

VHDL Verilog

17d

Connectivity Project Engineer, Principal

Qualcomm Toronto, Ontario

ASIC SOC

17d

Senior SoC/RTL Design Engineer

Qualcomm San Diego, California

Verilog ASIC

17d

Senior ASICS Packaging Engineer

Qualcomm San Diego, California

17d

Senior Hardware Test Engineer

Qualcomm San Diego, California

DFT Design for Test

17d

Staff SOC Mixed Signal Engineer

Qualcomm San Diego, California

ASIC Verification

17d

NoC Interconnect Design Engineer and Architect

Qualcomm San Diego, California

ASIC RTL

17d

Senior Staff engineer- GPU Power Engineer

Qualcomm Noida, Uttar Pradesh

FPGA RTL

17d

Ethernet Switch ASIC Design Engineer

Qualcomm Shanghai, Shanghai

ASIC RTL

17d

Staff RTL Verification Engineer – RISC-V Application Processor - Haifa

Qualcomm Haifa, Haifa District

SystemVerilog FPGA

17d

SOC Design Implementation Engineer

Qualcomm Hyderabad, Telangana

FPGA RTL

17d

ASIC Design Engineering - Multiple function

Qualcomm Taipei, Taipei

ASIC RTL

17d

RTL Design - Staff engineer

Qualcomm Chennai, Tamil Nadu

Verilog System Verilog

17d

Design Verification - Senior Staff Engineer

Qualcomm Hyderabad, Telangana

Verilog System Verilog

17d

PST Validation Engineer

Qualcomm San Diego, California

ASIC RTL

17d

NPU/AI Processor Synthesis -Staff Engineer

Qualcomm Bangalore, India

ASIC RTL

17d

Senior Staff Engineer in Microcontroller Sub-System Verification- Cork, Ireland

Qualcomm Cork, Munster

Verilog SystemVerilog

17d

DDR PHY Sr Staff Design Verification Engineer

Qualcomm Bangalore, India

Verilog System Verilog

17d

Physical Design Engineer, Sr. Staff

Qualcomm Austin, Texas

ASIC RTL

17d

Implementation Timing / STA Design Engineer

Qualcomm San Diego, California

ASIC RTL

17d

Memory Control Design Engineer

Qualcomm San Diego, California

ASIC RTL

17d

CPU Micro-Architect RTL Engineer

Qualcomm Austin, Texas

ASIC RTL

17d

2026 Campus Hire_ Sr.Engineer_ HW

Qualcomm Multiple locations

VHDL Verilog

17d

GPU PD Engineer (Austin/San Diego)

Qualcomm San Diego, California

Verilog System Verilog

17d

CPU Synthesis CAD Engineer

Qualcomm Multiple locations

Logic Design Place and Route

17d

Senior / Staff Product Manager – Camera SoC & Solutions (China)

Qualcomm Guangdong, China

SOC

17d

Principal SOC Architect, AI Accelerators (Multiple Locations

Qualcomm Multiple Locations

ASIC SOC

17d

Analog/Mixed Signal ASIC Design Engineer

Qualcomm San Diego, California

VHDL Verilog

17d

Staff Mixed Signal IC Design Engineer

Qualcomm Hsinchu City, Taiwan

VHDL Verilog

17d

SOC Design Verification Engineer

Qualcomm San Diego, California

ASIC RTL

17d

CPU RTL/AI Micro-Architect - AI Development

Qualcomm Multiple locations

VHDL Verilog

17d

CPU RTL Design - Sr Eng/Lead/Staff/Sr Staff

Qualcomm Bangalore, India

VHDL Verilog

17d

IP Library Circuit Design Engineer

Qualcomm Hsinchu City, Taiwan

ASIC RTL

17d

Analog / Mixed-Signal Sensor IP Design Engineer.

Qualcomm Cork, Munster

Verilog ASIC

17d

SOC Infrastructure IP System HW Architect

Qualcomm Multiple locations

RTL SOC

17d

System IP MicroArchitect

Qualcomm Bangalore, India

Verilog UVM

17d

Sr Radio Frequency Integrated Circuit (RFIC) Design Engineer

Qualcomm San Diego, California

ASIC SOC

17d

Design Eng - Modeling

Lattice Semiconductor Manila, Metro Manila

Verilog SystemVerilog

17d

Senior Staff Design Engineer

Lattice Semiconductor Penang, Malaysia

FPGA ASIC

17d

System Level Product Development Engineer

NVIDIA Santa Clara, California

ASIC DFT

17d

Product Development Engineer -- Post-Si Characterization

NVIDIA Santa Clara, California

ASIC Digital Design

17d

Characterization Product Development Engineer

NVIDIA Santa Clara, California

ASIC Digital Design

17d

Hardware Engineer

Optiver Austin, Texas

VHDL Verilog

17d

Aug. 28, 2026

Space Vehicle Verification and Validation Lead - Blue Ring

Blue Origin Multiple locations

Verification

18d

Senior Firmware Engineer, Security

Blue Origin Multiple locations

FPGA ASIC

18d

Senior Avionics Hardware Engineer - Lunar Permanence

Blue Origin Multiple locations

FPGA Design for Test

18d