Aug. 28, 2026

Senior Physical Design Engineer

Analog Devices Multiple locations

ASIC RTL

18d

Front-End Integration Engineer

NVIDIA Bengaluru, Karnataka

ASIC RTL

18d

Formal Verification Engineer

NVIDIA Shanghai, Shanghai

ASIC RTL

18d

Senior ASIC Verification Engineer

NVIDIA Multiple locations

SystemVerilog ASIC

18d

Senior Full-stack Software Engineer – Verification Data and Visualization Platform

NVIDIA Multiple locations

Verification

18d

Senior Verification Engineer, Digital IP

NXP Semiconductors Bangalore, India

Verilog System Verilog

18d

Senior Digital Design Engineer

NXP Semiconductors Pune, Maharashtra

Verilog System Verilog

18d

Senior Physical Design Engineer

NXP Semiconductors Pune, Maharashtra

RTL STA

18d

ASIC Physical Verification Lead

NXP Semiconductors Pune, Maharashtra

ASIC RTL

18d

Sr. Principal Technical Program Manager – Digital IP Development

NXP Semiconductors Austin, Texas

RTL Synthesis

18d

Senior Verification Engineer

NXP Semiconductors Austin, Texas

VHDL Verilog

18d

Senior Engineer II - IP Verification

Microchip Technology Hyderabad, Telangana

FPGA UVM

18d

Software Engineer

Microchip Technology Toronto, Ontario

FPGA Digital Design

18d

SoC Design Verification Engineer

Intel Bangalore, India

RTL UVM

18d

Pre-Si FPGA Platform Development Engineer (Temporary position)

Intel Guadalajara, Jalisco

VHDL Verilog

18d

FPGA Design Lead Electronic Combat Solutions

BAE Systems Multiple locations

VHDL Verilog

18d

Associate Staff Modem Verification Engineer

Silicon Labs Hyderabad, Telangana

SystemVerilog FPGA

18d

Senior Electrical Engineer II

Rocket Lab Pasadena, California

Verilog FPGA

18d

ASIC Technical Project Manager

Hudson River Trading New York, NY, United States

ASIC RTL

18d

Aug. 27, 2026

Sr CAD Engineer (Digital)

Analog Devices Bangalore, India

RTL Synthesis

19d

Senior ASIC Design Engineer

HPE Juniper Networks Bengaluru, Karnataka

Verilog ASIC

19d

ASIC Design Engineer 2

HPE Juniper Networks Sunnyvale, California

Verilog System Verilog

19d

Principal Electrical Engineer

BAE Systems Dallas, Texas

VHDL Verilog

19d

Senior Systems Engineer – Aftermarket & Production Support

BAE Systems Endicott, New York, United States

VHDL FPGA

19d

Formal Verification Engineer

Intel Bangalore, India

Verilog System Verilog

19d

Senior DFT Methodology - Data Analytics and Applied AI Engineer

NVIDIA Santa Clara, California

DFT Design for Test

19d

Radar Modeling Simulation Analysis Associate Systems Engineer

Northrop Grumman United States-Maryland-Linthicum

VHDL Verilog

19d

SLD Avionics FPGA Engineer III - Lunar Permanence

Blue Origin Denver, Colorado

VHDL Verilog

19d

Senior Test Integration Engineer – HLS Test Definition

Blue Origin Space Coast, Florida

HLS Verification

19d

Shift Leader - Cleaning, Passivation, and Verification Lab

Blue Origin Greater Seattle Area

Verification

19d

CPU Microarchitect/RTL Engineer

Apple Austin, Texas

VHDL Verilog

19d

Senior Engineer I - ASIC Verification

Microchip Technology Penang, Malaysia

SystemVerilog RTL

19d

Principal Engineer - CAD (Physical Verification)

Microchip Technology Chandler, Arizona

Verification

19d

Technical Staff Engineer - Verification

Microchip Technology Multiple locations

Verilog System Verilog

19d

FPGA Designer

Fidus Systems Austin, Texas

VHDL Verilog

19d

Lead Hardware Engineer

A2e Technologies San Diego, California

VHDL Verilog

19d

Staff Engineer, Diagnostic Development

Tenstorrent Toronto, Ontario

ASIC SOC

19d

Sr. Engineer, SoC Design Verification Engineer, System Management Controller

Tenstorrent Multiple locations

SystemVerilog UVM

19d

Aug. 26, 2026

Platform Software Engineer, Senior

AeroVironment Sunrise, Florida

FPGA SOC

20d

Sr Principal Systems Test Engineer – Verification PO (26-384)

Northrop Grumman Springs, Colorado

Verification

20d

Engineer Embedded Software

Northrop Grumman United States-California-San Diego

VHDL Verilog

20d

ASIC Engineering Intern, Networking Chip Design - 2027

NVIDIA Shanghai, Shanghai

RTL Verification

20d

Senior Formal Verification Engineer

NVIDIA Bengaluru, Karnataka

RTL Verification

20d

Senior Formal Verification Engineer

NVIDIA Yokneam, Israel

Verification

20d

ASIC Physical Design Intern - 2027

NVIDIA Shanghai, Shanghai

ASIC RTL

20d

ASIC DFT Engineer

Broadcom San Jose, California

Verilog ASIC

20d

SoC Logic Design Engineer

Intel Bangalore, India

Verilog System Verilog

20d

ASIC Design Engineer

HPE Juniper Networks Bengaluru, Karnataka

FPGA ASIC

20d

Silicon Validation/Emulation Design Engineer

Apple Sunnyvale, United States

RTL SOC

20d

Associate Design Verification Engineer

Analog Devices Dallas, Texas

Verilog SystemVerilog

20d