Sept. 3, 2026

SLD FPGA Verification Engineer III - Lunar Permanence

Blue Origin Space Coast, Florida

Verilog System Verilog

12d

Entry Level Digital Verification Engineer

NXP Semiconductors Austin, Texas

Verification

12d

Principal Digital Design Engineer

Allegro MicroSystems Hyderabad, Telangana

Verilog FPGA

12d

Senior FPGA Verification Engineer, Air Dominance and Strike

Anduril Costa Mesa, California

SystemVerilog FPGA

12d

Senior Digital Design Engineer, Air Dominance and Strike

Anduril Costa Mesa, California

VHDL Verilog

12d

Sept. 2, 2026

ASIC / NoC Power and Solutions Senior/Staff Engineer - Qualcomm - Guyancourt, France

Qualcomm Guyancourt, Île-de-France

ASIC RTL

13d

Power Management Systems Design and Verification Engineer

Qualcomm San Diego, California

VHDL Verilog

13d

Staff Engineer, Silicon & Data Automation Systems (Design, DFT, Diagnostics, Yield)

Qualcomm Bangalore, India

DFT

13d

RTL Design Engineer -Security /Staff

Qualcomm Bangalore, India

Verilog System Verilog

13d

NPU / AI Processor RTL Design - Sr Staff

Qualcomm Bangalore, India

VHDL Verilog

13d

CAD and PPA Methodology Engineer

Qualcomm San Diego, California

Verilog System Verilog

13d

2026 Campus Hire_ Associate Engineer_ HW

Qualcomm Multiple locations

VHDL Verilog

13d

Processor Micro Architect RTL Design Engineer (Multiple Levels)

Qualcomm San Diego, California

Verilog System Verilog

13d

Physical Design Engineer (Engineer up to Principal Level)

Qualcomm Multiple locations

ASIC RTL

13d

NPU/AI Processor Synthesis - Principal Engineer/Manager

Qualcomm Bangalore, India

ASIC RTL

13d

CPU-Core RTL Director

Qualcomm Multiple locations

SystemVerilog RTL

13d

Senior Lead Engineer- GPU Verification

Qualcomm Noida, Uttar Pradesh

Verilog System Verilog

13d

Heterogeneous Integration Physical Design Engineer, Staff

Qualcomm Hsinchu City, Taiwan

ASIC SOC

13d

Sensor Subsystem Design Engineer - Engineer OR Senior Level- Cork, Ireland

Qualcomm Cork, Munster

VHDL Verilog

13d

Director of Engineering for ML hardware design & Architecture

Qualcomm San Diego, California

Verilog SystemVerilog

13d

NPU/AI Processor Synthesis Staff/ Sr Staff/ Technical Lead

Qualcomm Bangalore, India

ASIC RTL

13d

Staff CPU Power Management Firmware Developer - Limits Management

Qualcomm Hyderabad, Telangana

FPGA SOC

13d

STCO Methodology & Framework Technologist, up to Staff

Qualcomm Hsinchu City, Taiwan

ASIC SOC

13d

Memory Yield Engineer, Staff

Qualcomm Hsinchu City, Taiwan

ASIC SOC

13d

Senior/Staff RTL Design Engineer - Haifa or Hod HaSharon

Qualcomm Multiple locations

ASIC RTL

13d

CPU RTL Methodology Engineer

Qualcomm Multiple locations

Verilog SystemVerilog

13d

CPU Systems Architect – Senior Level

Qualcomm Santa Clara, California

RTL Logic Design

13d

CPU Verification Engineer, Up to Staff Level

Qualcomm Hsinchu City, Taiwan

VHDL Verilog

13d

Staff CPU Power Management Firmware Developer - Performance Management

Qualcomm Hyderabad, Telangana

FPGA SOC

13d

RTL Design Engineer (Peripheral)- Sr Lead

Qualcomm Bangalore, India

Verilog System Verilog

13d

Staff Engineer, Physical Design/Implementation

Qualcomm Toronto, Ontario

ASIC Synthesis

13d

Engineer

Qualcomm Markham, Ontario

Verilog SystemVerilog

13d

Core CPU Physical Design Engineer (Lead/Staff/Sr Staff)

Qualcomm Bangalore, India

FPGA RTL

13d

CPU RTL Power Engineer (Sr Staff/Principal)

Qualcomm Bangalore, India

FPGA ASIC

13d

SOC Platform Architect

Qualcomm San Diego, California

ASIC SOC

13d

Senior Staff Verification Engineer - Video

Qualcomm Bangalore, India

SystemVerilog FPGA

13d

Implementation CAD Engineer

Qualcomm Tijuana, Baja California

ASIC Place and Route

13d

CPU RTL Power Engineer

Qualcomm Austin, Texas

VHDL Verilog

13d

RTL Design (SOC) Engineer-Staff

Qualcomm Bangalore, India

Synthesis SOC

13d

Staff Engineer – SOC Design Verification

Qualcomm Noida, Uttar Pradesh

Verilog System Verilog

13d

Microcontroller Sub-System Verification Engineer / Senior Engineer, - Cork, Ireland

Qualcomm Cork, Munster

SystemVerilog ASIC

13d

Senior ASIC Design Engineer, Low Power Audio AI Subsystems

Qualcomm Markham, Ontario

VHDL Verilog

13d

CPU Physical Design Engineer, San Diego

Qualcomm San Diego, California

Verilog RTL

13d

ASICS Design Verification Engineer-Senior

Qualcomm San Diego, California

VHDL Verilog

13d

Sr. Staff Verification Engineer- LoRa

Semtech Hyderabad, Telangana

SystemVerilog RTL

13d

Staff Analog IC Engineer

Semtech Hyderabad, Telangana

Verilog SystemVerilog

13d

Senior Engineer II - CAD (Physical Verification)

Microchip Technology Chandler, Arizona

Verification

13d

Advanced Packaging Design Verification & Physical Validation Engineer

Marvell Burlington, Vermont

Verification

13d

Senior Design Engineer - Post Silicon Validation

Lattice Semiconductor Pune, Maharashtra

VHDL Verilog

13d

Senior Manager, QA Engineering – Hardware & Firmware

Lattice Semiconductor Pune, Maharashtra

SystemVerilog FPGA

13d