July 28, 2026

Principal Design Verification Engineer – CPU Core LSU

SiFive Multiple locations

RTL SOC

1mo

Principal Design Verification Engineer – CPU Subsystem Power Management

SiFive Multiple locations

SystemVerilog ASIC

1mo

Principal Design Verification Engineer – CPU Core Hardware Prefetch

SiFive Multiple locations

RTL SOC

1mo

Principal Design Verification Engineer – CPU Core Frontend

SiFive Multiple locations

RTL SOC

1mo

Confidential Computing Software Architect

SiFive Santa Clara, California

RTL SOC

1mo

Linux Kernel Architect

SiFive Santa Clara, California

FPGA RTL

1mo

Senior Customer Release Engineer

SiFive Bengaluru, Karnataka

Verilog System Verilog

1mo

Sr. Manager Verification

Semtech Hyderabad, Telangana

VHDL Verilog

1mo

Senior Staff Digital Design Engineer

Semtech CHE - Neuchatel

VHDL Verilog

1mo

Principal Analog IC Design Engineer

Semtech GBR -Stansted

Verilog SystemVerilog

1mo

Staff Digital Engineer

Semtech Hyderabad, Telangana

VHDL Verilog

1mo

Sr. Staff Analog Engineer

Semtech Hyderabad, Telangana

VHDL Verilog

1mo

Embedded Firmware Engineer

Semtech Hyderabad, Telangana

VHDL Verilog

1mo

Staff Analog Engineer

Semtech Hyderabad, Telangana

VHDL Verilog

1mo

Sr. Staff Digital Engineer

Semtech Hyderabad, Telangana

VHDL Verilog

1mo

Staff Verification Design Engineer

Semtech Hyderabad, Telangana

VHDL Verilog

1mo

Staff Verification Design Engineer

Semtech Hyderabad, Telangana

VHDL Verilog

1mo

Sr. Staff Verification Engineer

Semtech Hyderabad, Telangana

VHDL Verilog

1mo

Engineer, Digital Design Verification

Semtech Ottawa, Ontario

SystemVerilog UVM

1mo

Principal Analog IC Design Engineer

Semtech GBR -Stansted

Verilog SystemVerilog

1mo

Analog IC Design Engineer

Semtech GBR -Stansted

Verilog SystemVerilog

1mo

Staff Test Engineer

Semtech GBR - Bristol

Digital Design DFT

1mo

Digital Design Verification Trainee

Semtech MEX - Aguascalientes

SystemVerilog UVM

1mo

Senior Embedded Firmware Design Engineer

Semtech San Diego, California

VHDL Verilog

1mo

Staff/Senior Staff Engineer - AMS Verification

Silicon Labs Hyderabad, Telangana

Verilog System Verilog

1mo

IC Design Engineer

Silicon Labs Singapore, Central Singapore

ASIC RTL

1mo

Senior Staff/ Staff Design Engineer

Silicon Labs Singapore, Central Singapore

ASIC RTL

1mo

Senior/Staff Test Engineer

Silicon Labs Singapore, Central Singapore

DFT Design for Test

1mo

Associate Staff CAD Engineer - Physical Verification

Silicon Labs Austin, Texas

SOC Verification

1mo

Staff Digital Design Engineer – SOC Low Power, Clocking & Integration

Silicon Labs Austin, Texas

Verilog System Verilog

1mo

Product Test Engineer

Silicon Labs Hsinchu

DFT Design for Test

1mo

Associate Staff/Staff Implementation Design Engineer

Silicon Labs Singapore, Central Singapore

ASIC RTL

1mo

Staff Design Engineer - SOC

Silicon Labs Singapore, Central Singapore

RTL Digital Design

1mo

HW System/SoC Architect

Ambiq Micro, Inc. Singapore, Central Singapore

FPGA ASIC

1mo

Staff Validation Engineer - Wireless Radio Lead

Ambiq Micro, Inc. Austin, Texas

Digital Design SOC

1mo

Staff Engineer - Software - DSP

Ambiq Micro, Inc. Singapore, Central Singapore

FPGA SOC

1mo

Staff Engineer - Embedded Software, Imaging

Ambiq Micro, Inc. Singapore, Central Singapore

FPGA SOC

1mo

Staff Engineer - DFT

Ambiq Micro, Inc. Hsinchu City, Taiwan

RTL STA

1mo

Staff Engineer - DFT

Ambiq Micro, Inc. Singapore, Central Singapore

RTL STA

1mo

Staff Engineer - Design Verification

Ambiq Micro, Inc. Singapore, Central Singapore

Verilog SystemVerilog

1mo

Sr. Staff SoC RTL Engineer

Ambiq Micro, Inc. Austin, Texas

Verilog SystemVerilog

1mo

Sr. Staff Engineer - Digital Design Verification

Ambiq Micro, Inc. Austin, Texas

Verilog SystemVerilog

1mo

Principal Engineer - DFT

Ambiq Micro, Inc. Austin, Texas

RTL STA

1mo

Senior Software Program Manager

Ambiq Micro, Inc. Austin, Texas

RTL SOC

1mo

Senior Engineer - Validation

Ambiq Micro, Inc. Hsinchu City, Taiwan

FPGA SOC

1mo

Senior Engineer, FPGA

Ambiq Micro, Inc. Singapore, Central Singapore

Verilog System Verilog

1mo

Senior Embedded Graphics Software Engineer

Ambiq Micro, Inc. Singapore, Central Singapore

FPGA SOC

1mo

Senior Director - System Architecture

Ambiq Micro, Inc. Austin, Texas

FPGA RTL

1mo

Principal SoC RTL Engineer

Ambiq Micro, Inc. Austin, Texas

Verilog SystemVerilog

1mo

Memory Design Engineer

Ambiq Micro, Inc. Singapore, Central Singapore

STA DFT

1mo